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lima/ppir: implement discard and discard_if
This commit also adds codegen for branch since we need it for discard_if. Reviewed-by: Qiang Yu <yuq825@gmail.com> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
This commit is contained in:
parent
7a7be61398
commit
af0de6b91c
7 changed files with 253 additions and 10 deletions
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@ -507,6 +507,42 @@ static void ppir_codegen_encode_const(ppir_const *constant, uint16_t *code)
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code[i] = util_float_to_half(constant->value[i].f);
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code[i] = util_float_to_half(constant->value[i].f);
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}
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}
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static void ppir_codegen_encode_discard(ppir_node *node, void *code)
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{
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ppir_codegen_field_branch *b = code;
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assert(node->op = ppir_op_discard);
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b->discard.word0 = PPIR_CODEGEN_DISCARD_WORD0;
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b->discard.word1 = PPIR_CODEGEN_DISCARD_WORD1;
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b->discard.word2 = PPIR_CODEGEN_DISCARD_WORD2;
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}
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static void ppir_codegen_encode_branch(ppir_node *node, void *code)
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{
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ppir_codegen_field_branch *b = code;
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ppir_branch_node *branch;
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ppir_instr *target_instr;
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if (node->op == ppir_op_discard) {
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ppir_codegen_encode_discard(node, code);
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return;
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}
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assert(node->op = ppir_op_branch);
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branch = ppir_node_to_branch(node);
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b->branch.unknown_0 = 0x0;
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b->branch.arg0_source = ppir_target_get_src_reg_index(&branch->src[0]);
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b->branch.arg1_source = ppir_target_get_src_reg_index(&branch->src[1]);
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b->branch.cond_gt = branch->cond_gt;
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b->branch.cond_eq = branch->cond_eq;
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b->branch.cond_lt = branch->cond_lt;
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b->branch.unknown_1 = 0x0;
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b->branch.unknown_2 = 0x3;
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target_instr = list_first_entry(&branch->target->instr_list, ppir_instr, list);
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b->branch.target = target_instr->offset - node->instr->offset;
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}
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typedef void (*ppir_codegen_instr_slot_encode_func)(ppir_node *, void *);
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typedef void (*ppir_codegen_instr_slot_encode_func)(ppir_node *, void *);
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static const ppir_codegen_instr_slot_encode_func
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static const ppir_codegen_instr_slot_encode_func
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@ -520,6 +556,7 @@ ppir_codegen_encode_slot[PPIR_INSTR_SLOT_NUM] = {
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[PPIR_INSTR_SLOT_ALU_SCL_ADD] = ppir_codegen_encode_scl_add,
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[PPIR_INSTR_SLOT_ALU_SCL_ADD] = ppir_codegen_encode_scl_add,
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[PPIR_INSTR_SLOT_ALU_COMBINE] = ppir_codegen_encode_combine,
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[PPIR_INSTR_SLOT_ALU_COMBINE] = ppir_codegen_encode_combine,
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[PPIR_INSTR_SLOT_STORE_TEMP] = ppir_codegen_encode_store_temp,
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[PPIR_INSTR_SLOT_STORE_TEMP] = ppir_codegen_encode_store_temp,
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[PPIR_INSTR_SLOT_BRANCH] = ppir_codegen_encode_branch,
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};
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};
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static const int ppir_codegen_field_size[] = {
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static const int ppir_codegen_field_size[] = {
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@ -634,7 +671,7 @@ static void ppir_codegen_print_prog(ppir_compiler *comp)
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printf("========ppir codegen========\n");
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printf("========ppir codegen========\n");
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list_for_each_entry(ppir_block, block, &comp->block_list, list) {
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list_for_each_entry(ppir_block, block, &comp->block_list, list) {
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list_for_each_entry(ppir_instr, instr, &block->instr_list, list) {
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list_for_each_entry(ppir_instr, instr, &block->instr_list, list) {
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printf("%03d: ", instr->index);
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printf("%03d (@%6ld): ", instr->index, instr->offset);
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int n = prog[0] & 0x1f;
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int n = prog[0] & 0x1f;
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for (int i = 0; i < n; i++) {
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for (int i = 0; i < n; i++) {
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if (i && i % 6 == 0)
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if (i && i % 6 == 0)
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@ -655,6 +692,7 @@ bool ppir_codegen_prog(ppir_compiler *comp)
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int size = 0;
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int size = 0;
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list_for_each_entry(ppir_block, block, &comp->block_list, list) {
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list_for_each_entry(ppir_block, block, &comp->block_list, list) {
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list_for_each_entry(ppir_instr, instr, &block->instr_list, list) {
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list_for_each_entry(ppir_instr, instr, &block->instr_list, list) {
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instr->offset = size;
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size += get_instr_encode_size(instr);
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size += get_instr_encode_size(instr);
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}
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}
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}
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}
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@ -135,6 +135,20 @@ static bool ppir_instr_insert_const(ppir_const *dst, const ppir_const *src,
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return true;
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return true;
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}
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}
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static void ppir_update_src_pipeline(ppir_pipeline pipeline, ppir_src *src,
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ppir_dest *dest, uint8_t *swizzle)
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{
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if (ppir_node_target_equal(src, dest)) {
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src->type = ppir_target_pipeline;
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src->pipeline = pipeline;
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if (swizzle) {
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for (int k = 0; k < 4; k++)
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src->swizzle[k] = swizzle[src->swizzle[k]];
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}
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}
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}
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/* make alu node src reflact the pipeline reg */
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/* make alu node src reflact the pipeline reg */
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static void ppir_instr_update_src_pipeline(ppir_instr *instr, ppir_pipeline pipeline,
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static void ppir_instr_update_src_pipeline(ppir_instr *instr, ppir_pipeline pipeline,
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ppir_dest *dest, uint8_t *swizzle)
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ppir_dest *dest, uint8_t *swizzle)
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@ -146,15 +160,16 @@ static void ppir_instr_update_src_pipeline(ppir_instr *instr, ppir_pipeline pipe
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ppir_alu_node *alu = ppir_node_to_alu(instr->slots[i]);
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ppir_alu_node *alu = ppir_node_to_alu(instr->slots[i]);
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for (int j = 0; j < alu->num_src; j++) {
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for (int j = 0; j < alu->num_src; j++) {
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ppir_src *src = alu->src + j;
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ppir_src *src = alu->src + j;
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if (ppir_node_target_equal(src, dest)) {
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ppir_update_src_pipeline(pipeline, src, dest, swizzle);
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src->type = ppir_target_pipeline;
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}
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src->pipeline = pipeline;
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}
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if (swizzle) {
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ppir_node *branch_node = instr->slots[PPIR_INSTR_SLOT_BRANCH];
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for (int k = 0; k < 4; k++)
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if (branch_node && (branch_node->type == ppir_node_type_branch)) {
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src->swizzle[k] = swizzle[src->swizzle[k]];
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ppir_branch_node *branch = ppir_node_to_branch(branch_node);
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}
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for (int j = 0; j < 2; j++) {
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}
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ppir_src *src = branch->src + j;
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ppir_update_src_pipeline(pipeline, src, dest, swizzle);
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}
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}
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}
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}
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}
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}
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@ -234,6 +249,7 @@ static struct {
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[PPIR_INSTR_SLOT_ALU_SCL_ADD] = { 4, "sadd" },
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[PPIR_INSTR_SLOT_ALU_SCL_ADD] = { 4, "sadd" },
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[PPIR_INSTR_SLOT_ALU_COMBINE] = { 4, "comb" },
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[PPIR_INSTR_SLOT_ALU_COMBINE] = { 4, "comb" },
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[PPIR_INSTR_SLOT_STORE_TEMP] = { 4, "stor" },
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[PPIR_INSTR_SLOT_STORE_TEMP] = { 4, "stor" },
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[PPIR_INSTR_SLOT_BRANCH] = { 4, "brch" },
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};
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};
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void ppir_instr_print_list(ppir_compiler *comp)
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void ppir_instr_print_list(ppir_compiler *comp)
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@ -400,6 +400,40 @@ static bool ppir_lower_trunc(ppir_block *block, ppir_node *node)
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return true;
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return true;
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}
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}
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static bool ppir_lower_branch(ppir_block *block, ppir_node *node)
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{
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ppir_branch_node *branch = ppir_node_to_branch(node);
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ppir_const_node *zero = ppir_node_create(block, ppir_op_const, -1, 0);
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if (!zero)
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return false;
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list_addtail(&zero->node.list, &node->list);
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zero->constant.value[0].f = 0;
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zero->constant.num = 1;
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zero->dest.type = ppir_target_ssa;
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zero->dest.ssa.num_components = 1;
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zero->dest.ssa.live_in = INT_MAX;
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zero->dest.ssa.live_out = 0;
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zero->dest.write_mask = 0x01;
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/* For now we're just comparing branch condition with 0,
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* in future we should look whether it's possible to move
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* comparision node into branch itself and use current
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* way as a fallback for complex conditions.
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*/
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branch->src[1].type = ppir_target_ssa;
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branch->src[1].ssa = &zero->dest.ssa;
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branch->cond_gt = true;
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branch->cond_lt = true;
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ppir_node_add_dep(&branch->node, &zero->node);
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return true;
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}
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static bool (*ppir_lower_funcs[ppir_op_num])(ppir_block *, ppir_node *) = {
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static bool (*ppir_lower_funcs[ppir_op_num])(ppir_block *, ppir_node *) = {
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[ppir_op_const] = ppir_lower_const,
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[ppir_op_const] = ppir_lower_const,
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[ppir_op_dot2] = ppir_lower_dot,
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[ppir_op_dot2] = ppir_lower_dot,
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@ -417,6 +451,7 @@ static bool (*ppir_lower_funcs[ppir_op_num])(ppir_block *, ppir_node *) = {
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[ppir_op_load_texture] = ppir_lower_texture,
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[ppir_op_load_texture] = ppir_lower_texture,
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[ppir_op_select] = ppir_lower_select,
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[ppir_op_select] = ppir_lower_select,
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[ppir_op_trunc] = ppir_lower_trunc,
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[ppir_op_trunc] = ppir_lower_trunc,
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[ppir_op_branch] = ppir_lower_branch,
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};
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};
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bool ppir_lower_prog(ppir_compiler *comp)
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bool ppir_lower_prog(ppir_compiler *comp)
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@ -204,6 +204,57 @@ static ppir_node *ppir_emit_alu(ppir_block *block, nir_instr *ni)
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return &node->node;
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return &node->node;
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}
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}
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static ppir_block *ppir_block_create(ppir_compiler *comp);
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static bool ppir_emit_discard_block(ppir_compiler *comp)
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{
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ppir_block *block = ppir_block_create(comp);
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ppir_discard_node *discard;
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if (!block)
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return false;
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comp->discard_block = block;
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block->comp = comp;
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discard = ppir_node_create(block, ppir_op_discard, -1, 0);
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if (discard)
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list_addtail(&discard->node.list, &block->node_list);
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else
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return false;
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return true;
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}
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static ppir_node *ppir_emit_discard_if(ppir_block *block, nir_instr *ni)
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{
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nir_intrinsic_instr *instr = nir_instr_as_intrinsic(ni);
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ppir_node *node;
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ppir_compiler *comp = block->comp;
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ppir_branch_node *branch;
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if (!comp->discard_block && !ppir_emit_discard_block(comp))
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return NULL;
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node = ppir_node_create(block, ppir_op_branch, -1, 0);
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if (!node)
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return NULL;
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branch = ppir_node_to_branch(node);
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/* second src and condition will be updated during lowering */
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ppir_node_add_src(block->comp, node, &branch->src[0],
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&instr->src[0], u_bit_consecutive(0, instr->num_components));
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branch->target = comp->discard_block;
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return node;
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}
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static ppir_node *ppir_emit_discard(ppir_block *block, nir_instr *ni)
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{
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ppir_node *node = ppir_node_create(block, ppir_op_discard, -1, 0);
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return node;
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}
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static ppir_node *ppir_emit_intrinsic(ppir_block *block, nir_instr *ni)
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static ppir_node *ppir_emit_intrinsic(ppir_block *block, nir_instr *ni)
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{
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{
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nir_intrinsic_instr *instr = nir_instr_as_intrinsic(ni);
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nir_intrinsic_instr *instr = nir_instr_as_intrinsic(ni);
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@ -264,6 +315,12 @@ static ppir_node *ppir_emit_intrinsic(ppir_block *block, nir_instr *ni)
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return &snode->node;
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return &snode->node;
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case nir_intrinsic_discard:
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return ppir_emit_discard(block, ni);
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case nir_intrinsic_discard_if:
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return ppir_emit_discard_if(block, ni);
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default:
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default:
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ppir_error("unsupported nir_intrinsic_instr %s\n",
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ppir_error("unsupported nir_intrinsic_instr %s\n",
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nir_intrinsic_infos[instr->intrinsic].name);
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nir_intrinsic_infos[instr->intrinsic].name);
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@ -452,6 +509,46 @@ static ppir_compiler *ppir_compiler_create(void *prog, unsigned num_reg, unsigne
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return comp;
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return comp;
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}
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}
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static void ppir_add_ordering_deps(ppir_compiler *comp)
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{
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/* Some intrinsics do not have explicit dependencies and thus depend
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* on instructions order. Consider discard_if and store_ouput as
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* example. If we don't add fake dependency of discard_if to store_output
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* scheduler may put store_output first and since store_output terminates
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* shader on Utgard PP, rest of it will never be executed.
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* Add fake dependencies for discard/branch/store to preserve
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* instruction order.
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*
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* TODO: scheduler should schedule discard_if as early as possible otherwise
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* we may end up with suboptimal code for cases like this:
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*
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* s3 = s1 < s2
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* discard_if s3
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* s4 = s1 + s2
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* store s4
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*
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* In this case store depends on discard_if and s4, but since dependencies can
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* be scheduled in any order it can result in code like this:
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*
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* instr1: s3 = s1 < s3
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* instr2: s4 = s1 + s2
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* instr3: discard_if s3
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* instr4: store s4
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*/
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list_for_each_entry(ppir_block, block, &comp->block_list, list) {
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ppir_node *prev_node = NULL;
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list_for_each_entry(ppir_node, node, &block->node_list, list) {
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if (node->type == ppir_node_type_discard ||
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node->type == ppir_node_type_store ||
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node->type == ppir_node_type_branch) {
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if (prev_node)
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ppir_node_add_dep(node, prev_node);
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prev_node = node;
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}
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}
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}
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}
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bool ppir_compile_nir(struct lima_fs_shader_state *prog, struct nir_shader *nir,
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bool ppir_compile_nir(struct lima_fs_shader_state *prog, struct nir_shader *nir,
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struct ra_regs *ra)
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struct ra_regs *ra)
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{
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{
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@ -477,6 +574,13 @@ bool ppir_compile_nir(struct lima_fs_shader_state *prog, struct nir_shader *nir,
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if (!ppir_emit_cf_list(comp, &func->body))
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if (!ppir_emit_cf_list(comp, &func->body))
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goto err_out0;
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goto err_out0;
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/* If we have discard block add it to the very end */
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||||||
|
if (comp->discard_block)
|
||||||
|
list_addtail(&comp->discard_block->list, &comp->block_list);
|
||||||
|
|
||||||
|
ppir_add_ordering_deps(comp);
|
||||||
|
|
||||||
ppir_node_print_prog(comp);
|
ppir_node_print_prog(comp);
|
||||||
|
|
||||||
if (!ppir_lower_prog(comp))
|
if (!ppir_lower_prog(comp))
|
||||||
|
|
|
||||||
|
|
@ -281,6 +281,20 @@ const ppir_op_info ppir_op_infos[] = {
|
||||||
PPIR_INSTR_SLOT_STORE_TEMP, PPIR_INSTR_SLOT_END
|
PPIR_INSTR_SLOT_STORE_TEMP, PPIR_INSTR_SLOT_END
|
||||||
},
|
},
|
||||||
},
|
},
|
||||||
|
[ppir_op_discard] = {
|
||||||
|
.name = "discard",
|
||||||
|
.type = ppir_node_type_discard,
|
||||||
|
.slots = (int []) {
|
||||||
|
PPIR_INSTR_SLOT_BRANCH, PPIR_INSTR_SLOT_END
|
||||||
|
},
|
||||||
|
},
|
||||||
|
[ppir_op_branch] = {
|
||||||
|
.name = "branch",
|
||||||
|
.type = ppir_node_type_branch,
|
||||||
|
.slots = (int []) {
|
||||||
|
PPIR_INSTR_SLOT_BRANCH, PPIR_INSTR_SLOT_END
|
||||||
|
},
|
||||||
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
void *ppir_node_create(ppir_block *block, ppir_op op, int index, unsigned mask)
|
void *ppir_node_create(ppir_block *block, ppir_op op, int index, unsigned mask)
|
||||||
|
|
@ -292,6 +306,8 @@ void *ppir_node_create(ppir_block *block, ppir_op op, int index, unsigned mask)
|
||||||
[ppir_node_type_load] = sizeof(ppir_load_node),
|
[ppir_node_type_load] = sizeof(ppir_load_node),
|
||||||
[ppir_node_type_store] = sizeof(ppir_store_node),
|
[ppir_node_type_store] = sizeof(ppir_store_node),
|
||||||
[ppir_node_type_load_texture] = sizeof(ppir_load_texture_node),
|
[ppir_node_type_load_texture] = sizeof(ppir_load_texture_node),
|
||||||
|
[ppir_node_type_discard] = sizeof(ppir_discard_node),
|
||||||
|
[ppir_node_type_branch] = sizeof(ppir_branch_node),
|
||||||
};
|
};
|
||||||
|
|
||||||
ppir_node_type type = ppir_op_infos[op].type;
|
ppir_node_type type = ppir_op_infos[op].type;
|
||||||
|
|
|
||||||
|
|
@ -93,7 +93,8 @@ static bool insert_to_each_succ_instr(ppir_block *block, ppir_node *node)
|
||||||
|
|
||||||
ppir_node_foreach_succ_safe(node, dep) {
|
ppir_node_foreach_succ_safe(node, dep) {
|
||||||
ppir_node *succ = dep->succ;
|
ppir_node *succ = dep->succ;
|
||||||
assert(succ->type == ppir_node_type_alu);
|
assert(succ->type == ppir_node_type_alu ||
|
||||||
|
succ->type == ppir_node_type_branch);
|
||||||
|
|
||||||
if (!ppir_instr_insert_node(succ->instr, node)) {
|
if (!ppir_instr_insert_node(succ->instr, node)) {
|
||||||
/* create a move node to insert for failed node */
|
/* create a move node to insert for failed node */
|
||||||
|
|
@ -323,6 +324,15 @@ static bool ppir_do_node_to_instr(ppir_block *block, ppir_node *node)
|
||||||
node = move;
|
node = move;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
case ppir_node_type_discard:
|
||||||
|
if (!create_new_instr(block, node))
|
||||||
|
return false;
|
||||||
|
node->instr->is_end = true;
|
||||||
|
break;
|
||||||
|
case ppir_node_type_branch:
|
||||||
|
if (!create_new_instr(block, node))
|
||||||
|
return false;
|
||||||
|
break;
|
||||||
default:
|
default:
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -108,6 +108,9 @@ typedef enum {
|
||||||
|
|
||||||
ppir_op_const,
|
ppir_op_const,
|
||||||
|
|
||||||
|
ppir_op_discard,
|
||||||
|
ppir_op_branch,
|
||||||
|
|
||||||
ppir_op_num,
|
ppir_op_num,
|
||||||
} ppir_op;
|
} ppir_op;
|
||||||
|
|
||||||
|
|
@ -117,6 +120,8 @@ typedef enum {
|
||||||
ppir_node_type_load,
|
ppir_node_type_load,
|
||||||
ppir_node_type_store,
|
ppir_node_type_store,
|
||||||
ppir_node_type_load_texture,
|
ppir_node_type_load_texture,
|
||||||
|
ppir_node_type_discard,
|
||||||
|
ppir_node_type_branch,
|
||||||
} ppir_node_type;
|
} ppir_node_type;
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
|
|
@ -254,6 +259,10 @@ typedef struct {
|
||||||
int sampler_dim;
|
int sampler_dim;
|
||||||
} ppir_load_texture_node;
|
} ppir_load_texture_node;
|
||||||
|
|
||||||
|
typedef struct {
|
||||||
|
ppir_node node;
|
||||||
|
} ppir_discard_node;
|
||||||
|
|
||||||
enum ppir_instr_slot {
|
enum ppir_instr_slot {
|
||||||
PPIR_INSTR_SLOT_VARYING,
|
PPIR_INSTR_SLOT_VARYING,
|
||||||
PPIR_INSTR_SLOT_TEXLD,
|
PPIR_INSTR_SLOT_TEXLD,
|
||||||
|
|
@ -264,6 +273,7 @@ enum ppir_instr_slot {
|
||||||
PPIR_INSTR_SLOT_ALU_SCL_ADD,
|
PPIR_INSTR_SLOT_ALU_SCL_ADD,
|
||||||
PPIR_INSTR_SLOT_ALU_COMBINE,
|
PPIR_INSTR_SLOT_ALU_COMBINE,
|
||||||
PPIR_INSTR_SLOT_STORE_TEMP,
|
PPIR_INSTR_SLOT_STORE_TEMP,
|
||||||
|
PPIR_INSTR_SLOT_BRANCH,
|
||||||
PPIR_INSTR_SLOT_NUM,
|
PPIR_INSTR_SLOT_NUM,
|
||||||
PPIR_INSTR_SLOT_END,
|
PPIR_INSTR_SLOT_END,
|
||||||
PPIR_INSTR_SLOT_ALU_START = PPIR_INSTR_SLOT_ALU_VEC_MUL,
|
PPIR_INSTR_SLOT_ALU_START = PPIR_INSTR_SLOT_ALU_VEC_MUL,
|
||||||
|
|
@ -287,6 +297,7 @@ typedef struct ppir_instr {
|
||||||
int est; /* earliest start time */
|
int est; /* earliest start time */
|
||||||
int parent_index;
|
int parent_index;
|
||||||
bool scheduled;
|
bool scheduled;
|
||||||
|
off_t offset;
|
||||||
} ppir_instr;
|
} ppir_instr;
|
||||||
|
|
||||||
typedef struct ppir_block {
|
typedef struct ppir_block {
|
||||||
|
|
@ -300,6 +311,15 @@ typedef struct ppir_block {
|
||||||
int sched_instr_base;
|
int sched_instr_base;
|
||||||
} ppir_block;
|
} ppir_block;
|
||||||
|
|
||||||
|
typedef struct {
|
||||||
|
ppir_node node;
|
||||||
|
ppir_src src[2];
|
||||||
|
bool cond_gt;
|
||||||
|
bool cond_eq;
|
||||||
|
bool cond_lt;
|
||||||
|
ppir_block *target;
|
||||||
|
} ppir_branch_node;
|
||||||
|
|
||||||
struct ra_regs;
|
struct ra_regs;
|
||||||
struct lima_fs_shader_state;
|
struct lima_fs_shader_state;
|
||||||
|
|
||||||
|
|
@ -322,6 +342,8 @@ typedef struct ppir_compiler {
|
||||||
|
|
||||||
/* for regalloc spilling debug */
|
/* for regalloc spilling debug */
|
||||||
int force_spilling;
|
int force_spilling;
|
||||||
|
|
||||||
|
ppir_block *discard_block;
|
||||||
} ppir_compiler;
|
} ppir_compiler;
|
||||||
|
|
||||||
void *ppir_node_create(ppir_block *block, ppir_op op, int index, unsigned mask);
|
void *ppir_node_create(ppir_block *block, ppir_op op, int index, unsigned mask);
|
||||||
|
|
@ -377,6 +399,8 @@ static inline ppir_node *ppir_node_first_pred(ppir_node *node)
|
||||||
#define ppir_node_to_load(node) ((ppir_load_node *)(node))
|
#define ppir_node_to_load(node) ((ppir_load_node *)(node))
|
||||||
#define ppir_node_to_store(node) ((ppir_store_node *)(node))
|
#define ppir_node_to_store(node) ((ppir_store_node *)(node))
|
||||||
#define ppir_node_to_load_texture(node) ((ppir_load_texture_node *)(node))
|
#define ppir_node_to_load_texture(node) ((ppir_load_texture_node *)(node))
|
||||||
|
#define ppir_node_to_discard(node) ((ppir_discard_node *)(node))
|
||||||
|
#define ppir_node_to_branch(node) ((ppir_branch_node *)(node))
|
||||||
|
|
||||||
static inline ppir_dest *ppir_node_get_dest(ppir_node *node)
|
static inline ppir_dest *ppir_node_get_dest(ppir_node *node)
|
||||||
{
|
{
|
||||||
|
|
|
||||||
Loading…
Add table
Reference in a new issue