From aee25471b9e83c10430d7ac5c7b80b1ae2d5ad17 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Thu, 18 Nov 2021 10:44:21 +0100 Subject: [PATCH] radv: fix emitting VBO when vertex input dynamic state is used In the following scenario: CmdBindPipeline() CmdBindVertexBuffers() CmdSetVertexInput() CmdDraw() CmdBindVertexBuffers() CmdSetVertexInput() CmdDraw() The VBO won't be updated for the second draw because the state is cleared when the dynamic state is emitted and the pipeline isn't dirty. Found by inspection. Cc: 21.3 mesa-stable Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen Part-of: --- src/amd/vulkan/radv_cmd_buffer.c | 17 ++++++++++------- src/amd/vulkan/radv_private.h | 1 - 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 43d9ae94748..1962fd5c34c 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -2968,7 +2968,7 @@ emit_prolog_inputs(struct radv_cmd_buffer *cmd_buffer, struct radv_shader *vs_sh } static void -radv_emit_vertex_state(struct radv_cmd_buffer *cmd_buffer, bool pipeline_is_dirty) +radv_emit_vertex_input(struct radv_cmd_buffer *cmd_buffer, bool pipeline_is_dirty) { struct radv_pipeline *pipeline = cmd_buffer->state.pipeline; struct radv_shader *vs_shader = radv_get_shader(pipeline, MESA_SHADER_VERTEX); @@ -3059,8 +3059,8 @@ radv_cmd_buffer_flush_dynamic_state(struct radv_cmd_buffer *cmd_buffer, bool pip if (states & RADV_CMD_DIRTY_DYNAMIC_COLOR_WRITE_ENABLE) radv_emit_color_write_enable(cmd_buffer); - if (states & RADV_CMD_DIRTY_VERTEX_STATE) - radv_emit_vertex_state(cmd_buffer, pipeline_is_dirty); + if (states & RADV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT) + radv_emit_vertex_input(cmd_buffer, pipeline_is_dirty); cmd_buffer->state.dirty &= ~states; } @@ -4493,7 +4493,8 @@ radv_CmdBindVertexBuffers2EXT(VkCommandBuffer commandBuffer, uint32_t firstBindi return; } - cmd_buffer->state.dirty |= RADV_CMD_DIRTY_VERTEX_STATE; + cmd_buffer->state.dirty |= RADV_CMD_DIRTY_VERTEX_BUFFER | + RADV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT; } static uint32_t @@ -5525,7 +5526,8 @@ radv_CmdSetVertexInputEXT(VkCommandBuffer commandBuffer, uint32_t vertexBindingD state->post_shuffle |= 1u << loc; } - cmd_buffer->state.dirty |= RADV_CMD_DIRTY_VERTEX_STATE; + cmd_buffer->state.dirty |= RADV_CMD_DIRTY_VERTEX_BUFFER | + RADV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT; } VKAPI_ATTR void VKAPI_CALL @@ -6322,8 +6324,9 @@ radv_need_late_scissor_emission(struct radv_cmd_buffer *cmd_buffer, /* Index, vertex and streamout buffers don't change context regs, and * pipeline is already handled. */ - used_states &= ~(RADV_CMD_DIRTY_INDEX_BUFFER | RADV_CMD_DIRTY_VERTEX_STATE | - RADV_CMD_DIRTY_STREAMOUT_BUFFER | RADV_CMD_DIRTY_PIPELINE); + used_states &= ~(RADV_CMD_DIRTY_INDEX_BUFFER | RADV_CMD_DIRTY_VERTEX_BUFFER | + RADV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT | RADV_CMD_DIRTY_STREAMOUT_BUFFER | + RADV_CMD_DIRTY_PIPELINE); if (cmd_buffer->state.dirty & used_states) return true; diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index ecf49afb404..6da338be924 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -1059,7 +1059,6 @@ enum radv_cmd_dirty_bits { RADV_CMD_DIRTY_FRAMEBUFFER = 1ull << 32, RADV_CMD_DIRTY_VERTEX_BUFFER = 1ull << 33, RADV_CMD_DIRTY_STREAMOUT_BUFFER = 1ull << 34, - RADV_CMD_DIRTY_VERTEX_STATE = RADV_CMD_DIRTY_VERTEX_BUFFER | RADV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT, }; enum radv_cmd_flush_bits {