From ad5c84999b9eb2522cdf78bb0890939450280cf3 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Mon, 9 May 2022 10:18:13 -0400 Subject: [PATCH] pan/bi: Rework Valhall register alignment Because we lower SPLIT and COLLECT before RA, we need to consider offsets when determining the dimensions of vectors, in order to align properly. Lowering COLLECT post-RA would avoid this special case. Signed-off-by: Alyssa Rosenzweig Part-of: --- src/panfrost/bifrost/bi_ra.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/src/panfrost/bifrost/bi_ra.c b/src/panfrost/bifrost/bi_ra.c index 3ad55144abd..2e3bf0fe332 100644 --- a/src/panfrost/bifrost/bi_ra.c +++ b/src/panfrost/bifrost/bi_ra.c @@ -267,13 +267,12 @@ bi_mark_interference(bi_block *block, struct lcra_state *l, uint8_t *live, uint6 * offset, so we shift right. */ unsigned count = bi_count_write_registers(ins, d); unsigned offset = ins->dest[d].offset; - uint64_t affinity = bi_make_affinity(preload_live, count, split_file); - + uint64_t affinity = bi_make_affinity(preload_live, count, split_file) >> offset; /* Valhall needs >= 64-bit staging writes to be pair-aligned */ - if (aligned_sr && count >= 2) + if (aligned_sr && (count >= 2 || offset)) affinity &= EVEN_BITS_MASK; - l->affinity[node] &= (affinity >> offset); + l->affinity[node] &= affinity; for (unsigned i = 0; i < node_count; ++i) { uint8_t r = live[i];