From ad56aaef4f47f6322286060c066ba29a39867be3 Mon Sep 17 00:00:00 2001 From: Bas Nieuwenhuizen Date: Fri, 18 Oct 2019 01:21:29 +0200 Subject: [PATCH] radv: Fix single stage constant flush with merged shaders. e.g. a VERTEX only flush with tess on Vega should look at the TCS to see which bits are needed. CC: Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1953 Reviewed-by: Samuel Pitoiset (cherry picked from commit fd21ee8b52fb9416b16c63fd34c699b1301ce30c) Conflicts resolved by Dylan Baker Conflicts: src/amd/vulkan/radv_cmd_buffer.c --- src/amd/vulkan/radv_cmd_buffer.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 952f5e7d54c..d5ca9d54bad 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -2268,14 +2268,15 @@ radv_flush_constants(struct radv_cmd_buffer *cmd_buffer, return; radv_foreach_stage(stage, stages) { - if (!pipeline->shaders[stage]) + shader = radv_get_shader(pipeline, stage); + if (!shader) continue; - need_push_constants |= pipeline->shaders[stage]->info.info.loads_push_constants; - need_push_constants |= pipeline->shaders[stage]->info.info.loads_dynamic_offsets; + need_push_constants |= shader->info.info.loads_push_constants; + need_push_constants |= shader->info.info.loads_dynamic_offsets; - uint8_t base = pipeline->shaders[stage]->info.info.base_inline_push_consts; - uint8_t count = pipeline->shaders[stage]->info.info.num_inline_push_consts; + uint8_t base = shader->info.info.base_inline_push_consts; + uint8_t count = shader->info.info.num_inline_push_consts; radv_emit_inline_push_consts(cmd_buffer, pipeline, stage, AC_UD_INLINE_PUSH_CONSTANTS,