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r600/sfn: Correct ssbo instruction handling
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6025>
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parent
11a861c78a
commit
ac87cc2205
2 changed files with 38 additions and 7 deletions
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@ -72,6 +72,15 @@ bool EmitSSBOInstruction::do_emit(nir_instr* instr)
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case nir_intrinsic_store_ssbo:
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return emit_store_ssbo(intr);
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case nir_intrinsic_ssbo_atomic_add:
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case nir_intrinsic_ssbo_atomic_comp_swap:
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case nir_intrinsic_ssbo_atomic_or:
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case nir_intrinsic_ssbo_atomic_xor:
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case nir_intrinsic_ssbo_atomic_imax:
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case nir_intrinsic_ssbo_atomic_imin:
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case nir_intrinsic_ssbo_atomic_umax:
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case nir_intrinsic_ssbo_atomic_umin:
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case nir_intrinsic_ssbo_atomic_and:
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case nir_intrinsic_ssbo_atomic_exchange:
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return emit_ssbo_atomic_op(intr);
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case nir_intrinsic_image_store:
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return emit_image_store(intr);
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@ -197,8 +206,10 @@ EmitSSBOInstruction::get_rat_opcode(const nir_intrinsic_op opcode, pipe_format f
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case nir_intrinsic_ssbo_atomic_umax:
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case nir_intrinsic_image_atomic_umax:
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return RatInstruction::MAX_UINT_RTN;
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case nir_intrinsic_ssbo_atomic_xor:
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case nir_intrinsic_image_atomic_xor:
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return RatInstruction::XOR_RTN;
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case nir_intrinsic_ssbo_atomic_comp_swap:
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case nir_intrinsic_image_atomic_comp_swap:
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if (util_format_is_float(format))
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return RatInstruction::CMPXCHG_FLT_RTN;
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@ -309,6 +320,8 @@ bool EmitSSBOInstruction::emit_store_ssbo(const nir_intrinsic_instr* instr)
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int temp1 = allocate_temp_register();
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GPRVector addr_vec(temp1, {0,1,2,7});
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auto temp2 = get_temp_vec4();
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auto rat_id = from_nir(instr->src[1], 0);
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emit_instruction(new AluInstruction(op2_lshr_int, addr_vec.reg_i(0), orig_addr,
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@ -339,12 +352,13 @@ bool EmitSSBOInstruction::emit_store_ssbo(const nir_intrinsic_instr* instr)
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emit_instruction(new RatInstruction(cf_mem_rat, RatInstruction::STORE_TYPED,
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values, addr_vec, m_ssbo_image_offset, rat_id, 1,
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1, 0, false));
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for (unsigned i = 1; i < nir_src_num_components(instr->src[0]); ++i) {
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emit_instruction(new AluInstruction(op1_mov, values.reg_i(0), from_nir(instr->src[0], i), write));
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emit_instruction(new AluInstruction(op1_mov, temp2.reg_i(0), from_nir(instr->src[0], i), write));
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emit_instruction(new AluInstruction(op2_add_int, addr_vec.reg_i(0),
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{addr_vec.reg_i(0), Value::one_i}, last_write));
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emit_instruction(new RatInstruction(cf_mem_rat, RatInstruction::STORE_TYPED,
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values, addr_vec, 0, rat_id, 1,
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temp2, addr_vec, 0, rat_id, 1,
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1, 0, false));
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}
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#endif
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@ -392,10 +406,24 @@ EmitSSBOInstruction::emit_ssbo_atomic_op(const nir_intrinsic_instr *intrin)
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auto opcode = EmitSSBOInstruction::get_rat_opcode(intrin->intrinsic, PIPE_FORMAT_R32_UINT);
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auto coord = from_nir_with_fetch_constant(intrin->src[1], 0);
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emit_instruction(new AluInstruction(op1_mov, m_rat_return_address.reg_i(0), from_nir(intrin->src[2], 0), write));
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emit_instruction(new AluInstruction(op1_mov, m_rat_return_address.reg_i(2), Value::zero, last_write));
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auto coord_orig = from_nir(intrin->src[1], 0, 0);
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auto coord = get_temp_register(0);
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emit_instruction(new AluInstruction(op2_lshr_int, coord, coord_orig, literal(2), last_write));
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if (intrin->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
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emit_instruction(new AluInstruction(op1_mov, m_rat_return_address.reg_i(0),
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from_nir(intrin->src[3], 0), {alu_write}));
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// TODO: cayman wants channel 2 here
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emit_instruction(new AluInstruction(op1_mov, m_rat_return_address.reg_i(3),
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from_nir(intrin->src[2], 0), {alu_last_instr, alu_write}));
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} else {
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emit_instruction(new AluInstruction(op1_mov, m_rat_return_address.reg_i(0),
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from_nir(intrin->src[2], 0), {alu_write}));
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emit_instruction(new AluInstruction(op1_mov, m_rat_return_address.reg_i(2), Value::zero, last_write));
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}
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GPRVector out_vec({coord, coord, coord, coord});
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@ -415,7 +443,7 @@ EmitSSBOInstruction::emit_ssbo_atomic_op(const nir_intrinsic_instr *intrin)
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0,
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false,
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0xf,
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R600_IMAGE_IMMED_RESOURCE_OFFSET,
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R600_IMAGE_IMMED_RESOURCE_OFFSET + imageid,
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0,
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bim_none,
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false,
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@ -423,7 +451,7 @@ EmitSSBOInstruction::emit_ssbo_atomic_op(const nir_intrinsic_instr *intrin)
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0,
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0,
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0,
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PValue(),
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image_offset,
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{0,7,7,7});
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fetch->set_flag(vtx_srf_mode);
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fetch->set_flag(vtx_use_tc);
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@ -117,9 +117,12 @@ bool ShaderFromNirProcessor::scan_instruction(nir_instr *instr)
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case nir_intrinsic_image_atomic_umin:
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case nir_intrinsic_ssbo_atomic_umax:
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case nir_intrinsic_image_atomic_umax:
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case nir_intrinsic_ssbo_atomic_xor:
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case nir_intrinsic_image_atomic_xor:
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case nir_intrinsic_ssbo_atomic_exchange:
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case nir_intrinsic_image_atomic_exchange:
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case nir_intrinsic_image_atomic_comp_swap:
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case nir_intrinsic_ssbo_atomic_comp_swap:
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m_sel.info.writes_memory = 1;
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/* fallthrough */
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case nir_intrinsic_image_load:
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