fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-23 00:20:09 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

nvc0: allow to force compiling programs in debug build

Browse source 
This adds a new envvar called NV50_PROG_CHIPSET which allows to
compile shaders with a different target, especially useful for
shader-db.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
This commit is contained in:
Samuel Pitoiset 2016-09-14 20:37:12 +02:00
parent e05042b367
commit ac859d68f4
1 changed files with 10 additions and 9 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

19
src/gallium/drivers/nouveau/nvc0/nvc0_program.c
View file

@ -562,6 +562,14 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t chipset,
info->bin.sourceRep = NV50_PROGRAM_IR_TGSI; info->bin.sourceRep = NV50_PROGRAM_IR_TGSI;
info->bin.source = (void *)prog->pipe.tokens; info->bin.source = (void *)prog->pipe.tokens;
#ifdef DEBUG
info->target = debug_get_num_option("NV50_PROG_CHIPSET", chipset);
info->optLevel = debug_get_num_option("NV50_PROG_OPTIMIZE", 3);
info->dbgFlags = debug_get_num_option("NV50_PROG_DEBUG", 0);
#else
info->optLevel = 3;
#endif
info->io.genUserClip = prog->vp.num_ucps; info->io.genUserClip = prog->vp.num_ucps;
info->io.auxCBSlot = 15; info->io.auxCBSlot = 15;
info->io.msInfoCBSlot = 15; info->io.msInfoCBSlot = 15;
@ -570,12 +578,12 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t chipset,
info->io.msInfoBase = NVC0_CB_AUX_MS_INFO; info->io.msInfoBase = NVC0_CB_AUX_MS_INFO;
info->io.bufInfoBase = NVC0_CB_AUX_BUF_INFO(0); info->io.bufInfoBase = NVC0_CB_AUX_BUF_INFO(0);
info->io.suInfoBase = NVC0_CB_AUX_SU_INFO(0); info->io.suInfoBase = NVC0_CB_AUX_SU_INFO(0);
if (chipset >= NVISA_GK104_CHIPSET) { if (info->target >= NVISA_GK104_CHIPSET) {
info->io.texBindBase = NVC0_CB_AUX_TEX_INFO(0); info->io.texBindBase = NVC0_CB_AUX_TEX_INFO(0);
} }
if (prog->type == PIPE_SHADER_COMPUTE) { if (prog->type == PIPE_SHADER_COMPUTE) {
if (chipset >= NVISA_GK104_CHIPSET) { if (info->target >= NVISA_GK104_CHIPSET) {
info->io.auxCBSlot = 7; info->io.auxCBSlot = 7;
info->io.msInfoCBSlot = 7; info->io.msInfoCBSlot = 7;
info->io.uboInfoBase = NVC0_CB_AUX_UBO_INFO(0); info->io.uboInfoBase = NVC0_CB_AUX_UBO_INFO(0);
@ -587,13 +595,6 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t chipset,
info->assignSlots = nvc0_program_assign_varying_slots; info->assignSlots = nvc0_program_assign_varying_slots;
#ifdef DEBUG
info->optLevel = debug_get_num_option("NV50_PROG_OPTIMIZE", 3);
info->dbgFlags = debug_get_num_option("NV50_PROG_DEBUG", 0);
#else
info->optLevel = 3;
#endif
ret = nv50_ir_generate_code(info); ret = nv50_ir_generate_code(info);
if (ret) { if (ret) {
NOUVEAU_ERR("shader translation failed: %i\n", ret); NOUVEAU_ERR("shader translation failed: %i\n", ret);