pvr: commonize limits

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33998>
This commit is contained in:
Simon Perretta 2024-11-15 23:20:15 +00:00 committed by Marge Bot
parent b13fe4e7a7
commit ac2460bb3c
8 changed files with 20 additions and 19 deletions

View file

@ -46,7 +46,6 @@ static const struct pvr_device_features pvr_device_features_33_V_11_3 = {
.has_max_usc_tasks = true,
.has_num_clusters = true,
.has_num_raster_pipes = true,
.has_num_user_clip_planes = true,
.has_pbe2_in_xe = true,
.has_pbe_filterable_f16 = true,
.has_pbe_yuv = true,
@ -82,7 +81,6 @@ static const struct pvr_device_features pvr_device_features_33_V_11_3 = {
.max_usc_tasks = 24U,
.num_clusters = 1U,
.num_raster_pipes = 1U,
.num_user_clip_planes = 8U,
.simple_parameter_format_version = 2U,
.slc_cache_line_size_bits = 512U,
.tile_size_x = 16U,

View file

@ -51,7 +51,6 @@ static const struct pvr_device_features pvr_device_features_36_V_104_796 = {
.has_max_usc_tasks = true,
.has_num_clusters = true,
.has_num_raster_pipes = true,
.has_num_user_clip_planes = true,
.has_paired_tiles = true,
.has_pbe2_in_xe = true,
.has_pbe_filterable_f16 = true,
@ -94,7 +93,6 @@ static const struct pvr_device_features pvr_device_features_36_V_104_796 = {
.max_usc_tasks = 156U,
.num_clusters = 1U,
.num_raster_pipes = 1U,
.num_user_clip_planes = 8U,
.simple_parameter_format_version = 2U,
.slc_cache_line_size_bits = 512U,
.tile_size_x = 16U,

View file

@ -52,7 +52,6 @@ static const struct pvr_device_features pvr_device_features_4_V_2_51 = {
.has_max_usc_tasks = true,
.has_num_clusters = true,
.has_num_raster_pipes = true,
.has_num_user_clip_planes = true,
.has_pbe_filterable_f16 = true,
.has_pbe_yuv = true,
.has_slc_cache_line_size_bits = true,
@ -85,7 +84,6 @@ static const struct pvr_device_features pvr_device_features_4_V_2_51 = {
.max_usc_tasks = 56U,
.num_clusters = 2U,
.num_raster_pipes = 1U,
.num_user_clip_planes = 8U,
.slc_cache_line_size_bits = 512U,
.tile_size_x = 32U,
.tile_size_y = 32U,

View file

@ -268,7 +268,6 @@ struct pvr_device_features {
bool has_max_usc_tasks : 1;
bool has_num_clusters : 1;
bool has_num_raster_pipes : 1;
bool has_num_user_clip_planes : 1;
bool has_paired_tiles : 1;
bool has_pbe2_in_xe : 1;
bool has_pbe_filterable_f16 : 1;
@ -318,7 +317,6 @@ struct pvr_device_features {
uint32_t max_usc_tasks;
uint32_t num_clusters;
uint32_t num_raster_pipes;
uint32_t num_user_clip_planes;
uint32_t simple_parameter_format_version;
uint32_t slc_cache_line_size_bits;
uint32_t tile_size_x;

View file

@ -56,6 +56,12 @@
*/
#define PVR_MAX_VERTEX_INPUT_BINDINGS 16U
#define PVR_TEXEL_BUFFER_OFFSET_ALIGNMENT 16U
#define PVR_UNIFORM_BUFFER_OFFSET_ALIGNMENT 4U
#define PVR_STORAGE_BUFFER_OFFSET_ALIGNMENT 4U
#define PVR_MAX_USER_PLANES 8U
/* We need one RenderTarget per supported MSAA mode as each render target
* contains state that is dependent on the sample count of the render that is
* rendering to it.

View file

@ -13,12 +13,16 @@
#include "nir/nir_builder.h"
#include "pco.h"
#include "pco_internal.h"
#include "pvr_limits.h"
#include <stdio.h>
/** Base/common SPIR-V to NIR options. */
static const struct spirv_to_nir_options pco_base_spirv_options = {
.environment = NIR_SPIRV_VULKAN,
.min_ubo_alignment = PVR_UNIFORM_BUFFER_OFFSET_ALIGNMENT,
.min_ssbo_alignment = PVR_STORAGE_BUFFER_OFFSET_ALIGNMENT,
};
/** Base/common NIR options. */

View file

@ -37,8 +37,8 @@
/* clang-format on */
#include "pvr_types.h"
#include "common/pvr_limits.h"
#include "csbgen/rogue_hwdefs.h"
#include "vulkan/pvr_limits.h"
#include "vulkan/pvr_common.h"
#include "compiler/nir/nir.h"

View file

@ -404,10 +404,6 @@ static bool pvr_physical_device_get_properties(
const uint32_t uvs_pba_entries =
PVR_GET_FEATURE_VALUE(dev_info, uvs_pba_entries, 160);
/* Default value based on the minimum value found in all existing cores. */
const uint32_t num_user_clip_planes =
PVR_GET_FEATURE_VALUE(dev_info, num_user_clip_planes, 8);
const uint32_t sub_pixel_precision =
PVR_HAS_FEATURE(dev_info, simple_internal_parameter_format) ? 4U : 8U;
@ -551,9 +547,9 @@ static bool pvr_physical_device_get_properties(
.viewportSubPixelBits = 0,
.minMemoryMapAlignment = pdevice->ws->page_size,
.minTexelBufferOffsetAlignment = 16U,
.minUniformBufferOffsetAlignment = 4U,
.minStorageBufferOffsetAlignment = 4U,
.minTexelBufferOffsetAlignment = PVR_TEXEL_BUFFER_OFFSET_ALIGNMENT,
.minUniformBufferOffsetAlignment = PVR_UNIFORM_BUFFER_OFFSET_ALIGNMENT,
.minStorageBufferOffsetAlignment = PVR_STORAGE_BUFFER_OFFSET_ALIGNMENT,
.minTexelOffset = -8,
.maxTexelOffset = 7U,
@ -580,9 +576,12 @@ static bool pvr_physical_device_get_properties(
.maxSampleMaskWords = 1U,
.timestampComputeAndGraphics = false,
.timestampPeriod = 0.0f,
.maxClipDistances = num_user_clip_planes,
.maxCullDistances = num_user_clip_planes,
.maxCombinedClipAndCullDistances = num_user_clip_planes,
/* Requires shaderClipDistance */
.maxClipDistances = 0U,
.maxCullDistances = 0U,
.maxCombinedClipAndCullDistances = 0U,
.discreteQueuePriorities = 2U,
.pointSizeRange[0] = 1.0f,
.pointSizeRange[1] = 511.0f,