mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-03-11 13:30:31 +01:00
anv: pass steam output as argument for anv_dump_pipe_bits
Just if you need to change it at some point ;) Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22178>
This commit is contained in:
parent
2415d57a99
commit
abc4111d19
3 changed files with 23 additions and 23 deletions
|
|
@ -4167,7 +4167,7 @@ struct anv_video_session_params {
|
||||||
};
|
};
|
||||||
|
|
||||||
void
|
void
|
||||||
anv_dump_pipe_bits(enum anv_pipe_bits bits);
|
anv_dump_pipe_bits(enum anv_pipe_bits bits, FILE *f);
|
||||||
|
|
||||||
static inline void
|
static inline void
|
||||||
anv_add_pending_pipe_bits(struct anv_cmd_buffer* cmd_buffer,
|
anv_add_pending_pipe_bits(struct anv_cmd_buffer* cmd_buffer,
|
||||||
|
|
@ -4177,9 +4177,9 @@ anv_add_pending_pipe_bits(struct anv_cmd_buffer* cmd_buffer,
|
||||||
cmd_buffer->state.pending_pipe_bits |= bits;
|
cmd_buffer->state.pending_pipe_bits |= bits;
|
||||||
if (INTEL_DEBUG(DEBUG_PIPE_CONTROL) && bits)
|
if (INTEL_DEBUG(DEBUG_PIPE_CONTROL) && bits)
|
||||||
{
|
{
|
||||||
fputs("pc: add ", stderr);
|
fputs("pc: add ", stdout);
|
||||||
anv_dump_pipe_bits(bits);
|
anv_dump_pipe_bits(bits, stdout);
|
||||||
fprintf(stderr, "reason: %s\n", reason);
|
fprintf(stdout, "reason: %s\n", reason);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -57,36 +57,36 @@ __anv_perf_warn(struct anv_device *device,
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
anv_dump_pipe_bits(enum anv_pipe_bits bits)
|
anv_dump_pipe_bits(enum anv_pipe_bits bits, FILE *f)
|
||||||
{
|
{
|
||||||
if (bits & ANV_PIPE_DEPTH_CACHE_FLUSH_BIT)
|
if (bits & ANV_PIPE_DEPTH_CACHE_FLUSH_BIT)
|
||||||
fputs("+depth_flush ", stderr);
|
fputs("+depth_flush ", f);
|
||||||
if (bits & ANV_PIPE_DATA_CACHE_FLUSH_BIT)
|
if (bits & ANV_PIPE_DATA_CACHE_FLUSH_BIT)
|
||||||
fputs("+dc_flush ", stderr);
|
fputs("+dc_flush ", f);
|
||||||
if (bits & ANV_PIPE_HDC_PIPELINE_FLUSH_BIT)
|
if (bits & ANV_PIPE_HDC_PIPELINE_FLUSH_BIT)
|
||||||
fputs("+hdc_flush ", stderr);
|
fputs("+hdc_flush ", f);
|
||||||
if (bits & ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT)
|
if (bits & ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT)
|
||||||
fputs("+rt_flush ", stderr);
|
fputs("+rt_flush ", f);
|
||||||
if (bits & ANV_PIPE_TILE_CACHE_FLUSH_BIT)
|
if (bits & ANV_PIPE_TILE_CACHE_FLUSH_BIT)
|
||||||
fputs("+tile_flush ", stderr);
|
fputs("+tile_flush ", f);
|
||||||
if (bits & ANV_PIPE_STATE_CACHE_INVALIDATE_BIT)
|
if (bits & ANV_PIPE_STATE_CACHE_INVALIDATE_BIT)
|
||||||
fputs("+state_inval ", stderr);
|
fputs("+state_inval ", f);
|
||||||
if (bits & ANV_PIPE_CONSTANT_CACHE_INVALIDATE_BIT)
|
if (bits & ANV_PIPE_CONSTANT_CACHE_INVALIDATE_BIT)
|
||||||
fputs("+const_inval ", stderr);
|
fputs("+const_inval ", f);
|
||||||
if (bits & ANV_PIPE_VF_CACHE_INVALIDATE_BIT)
|
if (bits & ANV_PIPE_VF_CACHE_INVALIDATE_BIT)
|
||||||
fputs("+vf_inval ", stderr);
|
fputs("+vf_inval ", f);
|
||||||
if (bits & ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT)
|
if (bits & ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT)
|
||||||
fputs("+tex_inval ", stderr);
|
fputs("+tex_inval ", f);
|
||||||
if (bits & ANV_PIPE_INSTRUCTION_CACHE_INVALIDATE_BIT)
|
if (bits & ANV_PIPE_INSTRUCTION_CACHE_INVALIDATE_BIT)
|
||||||
fputs("+ic_inval ", stderr);
|
fputs("+ic_inval ", f);
|
||||||
if (bits & ANV_PIPE_STALL_AT_SCOREBOARD_BIT)
|
if (bits & ANV_PIPE_STALL_AT_SCOREBOARD_BIT)
|
||||||
fputs("+pb_stall ", stderr);
|
fputs("+pb_stall ", f);
|
||||||
if (bits & ANV_PIPE_PSS_STALL_SYNC_BIT)
|
if (bits & ANV_PIPE_PSS_STALL_SYNC_BIT)
|
||||||
fputs("+pss_stall ", stderr);
|
fputs("+pss_stall ", f);
|
||||||
if (bits & ANV_PIPE_DEPTH_STALL_BIT)
|
if (bits & ANV_PIPE_DEPTH_STALL_BIT)
|
||||||
fputs("+depth_stall ", stderr);
|
fputs("+depth_stall ", f);
|
||||||
if (bits & ANV_PIPE_CS_STALL_BIT)
|
if (bits & ANV_PIPE_CS_STALL_BIT)
|
||||||
fputs("+cs_stall ", stderr);
|
fputs("+cs_stall ", f);
|
||||||
if (bits & ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT)
|
if (bits & ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT)
|
||||||
fputs("+utdp_flush", stderr);
|
fputs("+utdp_flush", f);
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -83,9 +83,9 @@ convert_pc_to_bits(struct GENX(PIPE_CONTROL) *pc) {
|
||||||
|
|
||||||
#define anv_debug_dump_pc(pc) \
|
#define anv_debug_dump_pc(pc) \
|
||||||
if (INTEL_DEBUG(DEBUG_PIPE_CONTROL)) { \
|
if (INTEL_DEBUG(DEBUG_PIPE_CONTROL)) { \
|
||||||
fputs("pc: emit PC=( ", stderr); \
|
fputs("pc: emit PC=( ", stdout); \
|
||||||
anv_dump_pipe_bits(convert_pc_to_bits(&(pc))); \
|
anv_dump_pipe_bits(convert_pc_to_bits(&(pc)), stdout); \
|
||||||
fprintf(stderr, ") reason: %s\n", __func__); \
|
fprintf(stdout, ") reason: %s\n", __func__); \
|
||||||
}
|
}
|
||||||
|
|
||||||
ALWAYS_INLINE static void
|
ALWAYS_INLINE static void
|
||||||
|
|
|
||||||
Loading…
Add table
Reference in a new issue