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freedreno/a6xx: Add CP_ROQ_*_STAT

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Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
This commit is contained in:
Connor Abbott 2022-10-17 16:38:57 +02:00 • committed by Marge Bot
parent 8c6d741e26
commit aba8aea2be
2 changed files with 18 additions and 6 deletions
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12
src/freedreno/.gitlab-ci/reference/crash.log
View file

@ -739,12 +739,12 @@ registers:
00000000 0x936: 00000000
00800000 0x937: 00800000
00000000 0x938: 00000000
00400031 0x939: 00400031
010c0107 0x93a: 010c0107
02000200 0x93b: 02000200
03000300 0x93c: 03000300
00b000b0 0x93d: 00b000b0
00d800d8 0x93e: 00d800d8
00400031 CP_ROQ_RB_STAT: { RPTR = 0x31 | WPTR = 0x40 }
010c0107 CP_ROQ_IB1_STAT: { RPTR = 0x107 | WPTR = 0x10c }
02000200 CP_ROQ_IB2_STAT: { RPTR = 0x200 | WPTR = 0x200 }
03000300 CP_ROQ_SDS_STAT: { RPTR = 0x300 | WPTR = 0x300 }
00b000b0 CP_ROQ_MRB_STAT: { RPTR = 0xb0 | WPTR = 0xb0 }
00d800d8 CP_ROQ_VSD_STAT: { RPTR = 0xd8 | WPTR = 0xd8 }
0000007f 0x942: 0000007f
0000000c 0x943: 0000000c
00000000 0x944: 00000000

12
src/freedreno/registers/adreno/a6xx.xml
View file

@ -1092,6 +1092,18 @@ to upconvert to 32b float internally?
This is used by CP to read the draw stream and skip empty draws
-->
<reg64 offset="0x0934" name="CP_VSD_BASE"/>
<bitset name="a6xx_roq_stat" inline="yes">
<bitfield name="RPTR" low="0" high="9"/>
<bitfield name="WPTR" low="16" high="25"/>
</bitset>
<reg32 offset="0x0939" name="CP_ROQ_RB_STAT" type="a6xx_roq_stat"/>
<reg32 offset="0x093a" name="CP_ROQ_IB1_STAT" type="a6xx_roq_stat"/>
<reg32 offset="0x093b" name="CP_ROQ_IB2_STAT" type="a6xx_roq_stat"/>
<reg32 offset="0x093c" name="CP_ROQ_SDS_STAT" type="a6xx_roq_stat"/>
<reg32 offset="0x093d" name="CP_ROQ_MRB_STAT" type="a6xx_roq_stat"/>
<reg32 offset="0x093e" name="CP_ROQ_VSD_STAT" type="a6xx_roq_stat"/>
<reg32 offset="0x0946" name="CP_MRB_DWORDS"/>
<reg32 offset="0x0947" name="CP_VSD_DWORDS"/>
<!--