From ab97fea3239ce330169e9cf30bcd23fe1da162e6 Mon Sep 17 00:00:00 2001
From: Faith Ekstrand <faith.ekstrand@collabora.com>
Date: Fri, 1 Aug 2025 16:33:26 -0400
Subject: [PATCH] nak: Increase Imma latencies on Blackwell by 4

We already do +8 on HMMA.  This gives us a +4 on IMMA which seems to fix
the test failures I'm seeing.  This fixes the IMMA CTS tests on my RTX
5090 with NAK_DEBUG=spill.

Fixes: 477533ee0082 ("nvk: add sm120 latencies via csv files.")
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36524>
---
 src/nouveau/compiler/nak/sm120_instr_latencies.rs | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/nouveau/compiler/nak/sm120_instr_latencies.rs b/src/nouveau/compiler/nak/sm120_instr_latencies.rs
index ce16df16c0f..06f63658d5a 100644
--- a/src/nouveau/compiler/nak/sm120_instr_latencies.rs
+++ b/src/nouveau/compiler/nak/sm120_instr_latencies.rs
@@ -428,6 +428,10 @@ impl SM120Latency {
                     || read_latency == RegLatencySM100::Hmma
                 {
                     RegLatencySM100::raw(write_latency, read_latency, false) + 9
+                } else if write_latency == RegLatencySM100::Imma
+                    || read_latency == RegLatencySM100::Imma
+                {
+                    RegLatencySM100::raw(write_latency, read_latency, false) + 5
                 } else {
                     RegLatencySM100::raw(write_latency, read_latency, false) + 1
                 }