From ab037b5daf91267be8b36361e21c30254ffb4600 Mon Sep 17 00:00:00 2001 From: Matt Turner Date: Thu, 16 Jan 2025 16:31:22 -0500 Subject: [PATCH] brw: Pass brw_codegen to next_offset In the next commit we will use this to assert that we are not reading past the end of `p->store`. Reviewed-by: Caio Oliveira Part-of: --- src/intel/compiler/brw_eu.h | 3 ++- src/intel/compiler/brw_eu_compact.c | 4 ++-- src/intel/compiler/brw_eu_emit.c | 8 ++++---- 3 files changed, 8 insertions(+), 7 deletions(-) diff --git a/src/intel/compiler/brw_eu.h b/src/intel/compiler/brw_eu.h index 0f3bcac9e18..f16816864bc 100644 --- a/src/intel/compiler/brw_eu.h +++ b/src/intel/compiler/brw_eu.h @@ -1586,8 +1586,9 @@ bool brw_validate_instructions(const struct brw_isa_info *isa, struct disasm_info *disasm); static inline int -next_offset(const struct intel_device_info *devinfo, void *store, int offset) +next_offset(struct brw_codegen *p, void *store, int offset) { + const struct intel_device_info *devinfo = p->devinfo; brw_eu_inst *insn = (brw_eu_inst *)((char *)store + offset); if (brw_eu_inst_cmpt_control(devinfo, insn)) diff --git a/src/intel/compiler/brw_eu_compact.c b/src/intel/compiler/brw_eu_compact.c index 4c51b5300bb..2385005d59c 100644 --- a/src/intel/compiler/brw_eu_compact.c +++ b/src/intel/compiler/brw_eu_compact.c @@ -2402,7 +2402,7 @@ brw_compact_instructions(struct brw_codegen *p, int start_offset, /* Fix up control flow offsets. */ p->next_insn_offset = start_offset + offset; for (offset = 0; offset < p->next_insn_offset - start_offset; - offset = next_offset(devinfo, store, offset)) { + offset = next_offset(p, store, offset)) { brw_eu_inst *insn = store + offset; int this_old_ip = old_ip[offset / sizeof(brw_eu_compact_inst)]; int this_compacted_count = compacted_counts[this_old_ip]; @@ -2494,7 +2494,7 @@ brw_compact_instructions(struct brw_codegen *p, int start_offset, sizeof(brw_eu_inst) != group->offset) { assert(start_offset + old_ip[offset / sizeof(brw_eu_compact_inst)] * sizeof(brw_eu_inst) < group->offset); - offset = next_offset(devinfo, store, offset); + offset = next_offset(p, store, offset); } group->offset = start_offset + offset; diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c index 02afc6bf241..accbd2a70b5 100644 --- a/src/intel/compiler/brw_eu_emit.c +++ b/src/intel/compiler/brw_eu_emit.c @@ -1547,9 +1547,9 @@ brw_find_next_block_end(struct brw_codegen *p, int start_offset) int depth = 0; - for (offset = next_offset(devinfo, store, start_offset); + for (offset = next_offset(p, store, start_offset); offset < p->next_insn_offset; - offset = next_offset(devinfo, store, offset)) { + offset = next_offset(p, store, offset)) { brw_eu_inst *insn = store + offset; switch (brw_eu_inst_opcode(p->isa, insn)) { @@ -1595,9 +1595,9 @@ brw_find_loop_end(struct brw_codegen *p, int start_offset) /* Always start after the instruction (such as a WHILE) we're trying to fix * up. */ - for (offset = next_offset(devinfo, store, start_offset); + for (offset = next_offset(p, store, start_offset); offset < p->next_insn_offset; - offset = next_offset(devinfo, store, offset)) { + offset = next_offset(p, store, offset)) { brw_eu_inst *insn = store + offset; if (brw_eu_inst_opcode(p->isa, insn) == BRW_OPCODE_WHILE) {