diff --git a/src/gallium/drivers/radeonsi/si_nir_lower_abi.c b/src/gallium/drivers/radeonsi/si_nir_lower_abi.c index 0feb201b255..c6f6e3f4699 100644 --- a/src/gallium/drivers/radeonsi/si_nir_lower_abi.c +++ b/src/gallium/drivers/radeonsi/si_nir_lower_abi.c @@ -725,14 +725,14 @@ static bool lower_intrinsic(nir_builder *b, nir_instr *instr, struct lower_abi_s break; case nir_intrinsic_load_tcs_tess_levels_to_tes_amd: if (shader->is_monolithic) { - replacement = nir_imm_bool(b, key->ge.part.tcs.epilog.tes_reads_tess_factors); + replacement = nir_imm_bool(b, key->ge.opt.tes_reads_tess_factors); } else { replacement = nir_ine_imm(b, ac_nir_unpack_arg(b, &args->ac, args->tcs_offchip_layout, 31, 1), 0); } break; case nir_intrinsic_load_tcs_primitive_mode_amd: if (shader->is_monolithic) { - replacement = nir_imm_int(b, key->ge.part.tcs.epilog.prim_mode); + replacement = nir_imm_int(b, key->ge.opt.tes_prim_mode); } else { replacement = ac_nir_unpack_arg(b, &args->ac, args->tcs_offchip_layout, 29, 2); } diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index f03f5a5963a..b4d8acef8b0 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -1463,7 +1463,8 @@ static void si_dump_shader_key(const struct si_shader *shader, FILE *f) if (shader->selector->screen->info.gfx_level >= GFX9) si_dump_shader_key_vs(key, f); - fprintf(f, " part.tcs.epilog.prim_mode = %u\n", key->ge.part.tcs.epilog.prim_mode); + fprintf(f, " opt.tes_prim_mode = %u\n", key->ge.opt.tes_prim_mode); + fprintf(f, " opt.tes_reads_tess_factors = %u\n", key->ge.opt.tes_reads_tess_factors); fprintf(f, " opt.prefer_mono = %u\n", key->ge.opt.prefer_mono); fprintf(f, " opt.same_patch_vertices = %u\n", key->ge.opt.same_patch_vertices); break; @@ -1807,7 +1808,7 @@ static bool si_lower_io_to_mem(struct si_shader *shader, nir_shader *nir, key->ge.opt.same_patch_vertices); /* Used by hs_emit_write_tess_factors() when monolithic shader. */ - nir->info.tess._primitive_mode = key->ge.part.tcs.epilog.prim_mode; + nir->info.tess._primitive_mode = key->ge.opt.tes_prim_mode; NIR_PASS_V(nir, ac_nir_lower_hs_outputs_to_mem, si_map_io_driver_location, sel->screen->info.gfx_level, diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h index 71034141b0e..e0b41bc3c87 100644 --- a/src/gallium/drivers/radeonsi/si_shader.h +++ b/src/gallium/drivers/radeonsi/si_shader.h @@ -610,13 +610,6 @@ struct si_shader_selector { */ #pragma pack(push, 1) -/* Common TCS bits between the shader key and the epilog key. */ -struct si_tcs_epilog_bits { - unsigned prim_mode : 3; - unsigned invoc0_tess_factors_are_def : 1; - unsigned tes_reads_tess_factors : 1; -}; - /* Common PS bits between the shader key and the prolog key. */ struct si_ps_prolog_bits { unsigned color_two_side : 1; @@ -647,9 +640,6 @@ struct si_ps_epilog_bits { }; union si_shader_part_key { - struct { - struct si_tcs_epilog_bits states; - } tcs_epilog; struct { struct si_ps_prolog_bits states; unsigned wave32 : 1; @@ -680,7 +670,6 @@ struct si_shader_key_ge { union { struct { struct si_shader_selector *ls; /* for merged LS-HS */ - struct si_tcs_epilog_bits epilog; } tcs; /* tessellation control shader */ struct { struct si_shader_selector *es; /* for merged ES-GS */ @@ -731,6 +720,7 @@ struct si_shader_key_ge { /* For NGG VS and TES. */ unsigned ngg_culling : 13; /* SI_NGG_CULL_* */ + /* For shaders where monolithic variants have better code. * * This is a flag that has no effect on code generation, @@ -742,6 +732,10 @@ struct si_shader_key_ge { /* VS and TCS have the same number of patch vertices. */ unsigned same_patch_vertices:1; + /* For TCS. */ + unsigned tes_prim_mode : 3; + unsigned tes_reads_tess_factors : 1; + unsigned inline_uniforms:1; /* This must be kept last to limit the number of variants diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.cpp b/src/gallium/drivers/radeonsi/si_state_shaders.cpp index 770334e2e38..52da81b5419 100644 --- a/src/gallium/drivers/radeonsi/si_state_shaders.cpp +++ b/src/gallium/drivers/radeonsi/si_state_shaders.cpp @@ -3656,8 +3656,6 @@ static void si_bind_tcs_shader(struct pipe_context *ctx, void *state) sctx->shader.tcs.cso = sel; sctx->shader.tcs.current = (sel && sel->variants_count) ? sel->variants[0] : NULL; - sctx->shader.tcs.key.ge.part.tcs.epilog.invoc0_tess_factors_are_def = - sel ? sel->info.tessfactors_are_def_in_all_invocs : 0; si_update_tess_uses_prim_id(sctx); si_update_tess_in_out_patch_vertices(sctx); @@ -3683,10 +3681,10 @@ static void si_bind_tes_shader(struct pipe_context *ctx, void *state) sctx->ia_multi_vgt_param_key.u.uses_tess = sel != NULL; si_update_tess_uses_prim_id(sctx); - sctx->shader.tcs.key.ge.part.tcs.epilog.prim_mode = + sctx->shader.tcs.key.ge.opt.tes_prim_mode = sel ? sel->info.base.tess._primitive_mode : 0; - sctx->shader.tcs.key.ge.part.tcs.epilog.tes_reads_tess_factors = + sctx->shader.tcs.key.ge.opt.tes_reads_tess_factors = sel ? sel->info.reads_tess_factors : 0; if (sel) { @@ -4372,9 +4370,6 @@ bool si_set_tcs_to_fixed_func_shader(struct si_context *sctx) } sctx->shader.tcs.cso = tcs; - sctx->shader.tcs.key.ge.part.tcs.epilog.invoc0_tess_factors_are_def = - tcs->info.tessfactors_are_def_in_all_invocs; - return true; }