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radeon/llvm: Add optimization for FP_ROUND

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This commit is contained in:
Tom Stellard 2012-09-13 15:08:40 +00:00
parent 87decd6e66
commit aa8367dd13
2 changed files with 27 additions and 0 deletions
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26
src/gallium/drivers/radeon/R600ISelLowering.cpp
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@ -50,6 +50,9 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) :
setOperationAction(ISD::SETCC, MVT::i32, Custom);
setOperationAction(ISD::SETCC, MVT::f32, Custom);
setOperationAction(ISD::FP_TO_UINT, MVT::i1, Custom);
setTargetDAGCombine(ISD::FP_ROUND);
setSchedulingPreference(Sched::VLIW);
}
@ -603,3 +606,26 @@ SDValue R600TargetLowering::LowerFormalArguments(
}
return Chain;
}
//===----------------------------------------------------------------------===//
// Custom DAG Optimizations
//===----------------------------------------------------------------------===//
SDValue R600TargetLowering::PerformDAGCombine(SDNode *N,
DAGCombinerInfo &DCI) const
{
SelectionDAG &DAG = DCI.DAG;
switch (N->getOpcode()) {
// (f32 fp_round (f64 uint_to_fp a)) -> (f32 uint_to_fp a)
case ISD::FP_ROUND: {
SDValue Arg = N->getOperand(0);
if (Arg.getOpcode() == ISD::UINT_TO_FP && Arg.getValueType() == MVT::f64) {
return DAG.getNode(ISD::UINT_TO_FP, N->getDebugLoc(), N->getValueType(0),
Arg.getOperand(0));
}
break;
}
}
return SDValue();
}

1
src/gallium/drivers/radeon/R600ISelLowering.h
View file

@ -27,6 +27,7 @@ public:
virtual MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr *MI,
MachineBasicBlock * BB) const;
virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
void ReplaceNodeResults(SDNode * N,
SmallVectorImpl<SDValue> &Results,
SelectionDAG &DAG) const;