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tgsi: Update for gallium interface changes.

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This commit is contained in:
Michal Krol 2009-11-02 09:41:40 +00:00
parent 0a7d50ed7e
commit aa2b2e5d7d
10 changed files with 137 additions and 542 deletions
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266
src/gallium/auxiliary/tgsi/tgsi_build.c
View file

@ -472,9 +472,9 @@ tgsi_default_full_instruction( void )
unsigned i;
full_instruction.Instruction = tgsi_default_instruction();
full_instruction.InstructionExtNv = tgsi_default_instruction_ext_nv();
full_instruction.InstructionExtLabel = tgsi_default_instruction_ext_label();
full_instruction.InstructionExtTexture = tgsi_default_instruction_ext_texture();
full_instruction.InstructionExtPredicate = tgsi_default_instruction_ext_predicate();
for( i = 0; i < TGSI_FULL_MAX_DST_REGISTERS; i++ ) {
full_instruction.FullDstRegisters[i] = tgsi_default_full_dst_register();
}
@ -512,34 +512,6 @@ tgsi_build_full_instruction(
header );
prev_token = (struct tgsi_token *) instruction;
if( tgsi_compare_instruction_ext_nv(
full_inst->InstructionExtNv,
tgsi_default_instruction_ext_nv() ) ) {
struct tgsi_instruction_ext_nv *instruction_ext_nv;
if( maxsize <= size )
return 0;
instruction_ext_nv =
(struct tgsi_instruction_ext_nv *) &tokens[size];
size++;
*instruction_ext_nv = tgsi_build_instruction_ext_nv(
full_inst->InstructionExtNv.Precision,
full_inst->InstructionExtNv.CondDstIndex,
full_inst->InstructionExtNv.CondFlowIndex,
full_inst->InstructionExtNv.CondMask,
full_inst->InstructionExtNv.CondSwizzleX,
full_inst->InstructionExtNv.CondSwizzleY,
full_inst->InstructionExtNv.CondSwizzleZ,
full_inst->InstructionExtNv.CondSwizzleW,
full_inst->InstructionExtNv.CondDstUpdate,
full_inst->InstructionExtNv.CondFlowEnable,
prev_token,
instruction,
header );
prev_token = (struct tgsi_token *) instruction_ext_nv;
}
if( tgsi_compare_instruction_ext_label(
full_inst->InstructionExtLabel,
tgsi_default_instruction_ext_label() ) ) {
@ -578,6 +550,29 @@ tgsi_build_full_instruction(
prev_token = (struct tgsi_token *) instruction_ext_texture;
}
if (tgsi_compare_instruction_ext_predicate(full_inst->InstructionExtPredicate,
tgsi_default_instruction_ext_predicate())) {
struct tgsi_instruction_ext_predicate *instruction_ext_predicate;
if (maxsize <= size) {
return 0;
}
instruction_ext_predicate = (struct tgsi_instruction_ext_predicate *)&tokens[size];
size++;
*instruction_ext_predicate =
tgsi_build_instruction_ext_predicate(full_inst->InstructionExtPredicate.SrcIndex,
full_inst->InstructionExtPredicate.Negate,
full_inst->InstructionExtPredicate.SwizzleX,
full_inst->InstructionExtPredicate.SwizzleY,
full_inst->InstructionExtPredicate.SwizzleZ,
full_inst->InstructionExtPredicate.SwizzleW,
prev_token,
instruction,
header);
prev_token = (struct tgsi_token *)instruction_ext_predicate;
}
for( i = 0; i < full_inst->Instruction.NumDstRegs; i++ ) {
const struct tgsi_full_dst_register *reg = &full_inst->FullDstRegisters[i];
struct tgsi_dst_register *dst_register;
@ -597,30 +592,6 @@ tgsi_build_full_instruction(
header );
prev_token = (struct tgsi_token *) dst_register;
if( tgsi_compare_dst_register_ext_concode(
reg->DstRegisterExtConcode,
tgsi_default_dst_register_ext_concode() ) ) {
struct tgsi_dst_register_ext_concode *dst_register_ext_concode;
if( maxsize <= size )
return 0;
dst_register_ext_concode =
(struct tgsi_dst_register_ext_concode *) &tokens[size];
size++;
*dst_register_ext_concode = tgsi_build_dst_register_ext_concode(
reg->DstRegisterExtConcode.CondMask,
reg->DstRegisterExtConcode.CondSwizzleX,
reg->DstRegisterExtConcode.CondSwizzleY,
reg->DstRegisterExtConcode.CondSwizzleZ,
reg->DstRegisterExtConcode.CondSwizzleW,
reg->DstRegisterExtConcode.CondSrcIndex,
prev_token,
instruction,
header );
prev_token = (struct tgsi_token *) dst_register_ext_concode;
}
if( tgsi_compare_dst_register_ext_modulate(
reg->DstRegisterExtModulate,
tgsi_default_dst_register_ext_modulate() ) ) {
@ -775,29 +746,6 @@ tgsi_build_full_instruction(
return size;
}
struct tgsi_instruction_ext_nv
tgsi_default_instruction_ext_nv( void )
{
struct tgsi_instruction_ext_nv instruction_ext_nv;
instruction_ext_nv.Type = TGSI_INSTRUCTION_EXT_TYPE_NV;
instruction_ext_nv.Precision = TGSI_PRECISION_DEFAULT;
instruction_ext_nv.CondDstIndex = 0;
instruction_ext_nv.CondFlowIndex = 0;
instruction_ext_nv.CondMask = TGSI_CC_TR;
instruction_ext_nv.CondSwizzleX = TGSI_SWIZZLE_X;
instruction_ext_nv.CondSwizzleY = TGSI_SWIZZLE_Y;
instruction_ext_nv.CondSwizzleZ = TGSI_SWIZZLE_Z;
instruction_ext_nv.CondSwizzleW = TGSI_SWIZZLE_W;
instruction_ext_nv.CondDstUpdate = 0;
instruction_ext_nv.CondFlowEnable = 0;
instruction_ext_nv.Padding = 0;
instruction_ext_nv.Extended = 0;
return instruction_ext_nv;
}
/** test for inequality of 32-bit values pointed to by a and b */
static INLINE boolean
compare32(const void *a, const void *b)
@ -805,53 +753,6 @@ compare32(const void *a, const void *b)
return *((uint32_t *) a) != *((uint32_t *) b);
}
unsigned
tgsi_compare_instruction_ext_nv(
struct tgsi_instruction_ext_nv a,
struct tgsi_instruction_ext_nv b )
{
a.Padding = b.Padding = 0;
a.Extended = b.Extended = 0;
return compare32(&a, &b);
}
struct tgsi_instruction_ext_nv
tgsi_build_instruction_ext_nv(
unsigned precision,
unsigned cond_dst_index,
unsigned cond_flow_index,
unsigned cond_mask,
unsigned cond_swizzle_x,
unsigned cond_swizzle_y,
unsigned cond_swizzle_z,
unsigned cond_swizzle_w,
unsigned cond_dst_update,
unsigned cond_flow_enable,
struct tgsi_token *prev_token,
struct tgsi_instruction *instruction,
struct tgsi_header *header )
{
struct tgsi_instruction_ext_nv instruction_ext_nv;
instruction_ext_nv = tgsi_default_instruction_ext_nv();
instruction_ext_nv.Precision = precision;
instruction_ext_nv.CondDstIndex = cond_dst_index;
instruction_ext_nv.CondFlowIndex = cond_flow_index;
instruction_ext_nv.CondMask = cond_mask;
instruction_ext_nv.CondSwizzleX = cond_swizzle_x;
instruction_ext_nv.CondSwizzleY = cond_swizzle_y;
instruction_ext_nv.CondSwizzleZ = cond_swizzle_z;
instruction_ext_nv.CondSwizzleW = cond_swizzle_w;
instruction_ext_nv.CondDstUpdate = cond_dst_update;
instruction_ext_nv.CondFlowEnable = cond_flow_enable;
prev_token->Extended = 1;
instruction_grow( instruction, header );
return instruction_ext_nv;
}
struct tgsi_instruction_ext_label
tgsi_default_instruction_ext_label( void )
{
@ -934,6 +835,60 @@ tgsi_build_instruction_ext_texture(
return instruction_ext_texture;
}
struct tgsi_instruction_ext_predicate
tgsi_default_instruction_ext_predicate(void)
{
struct tgsi_instruction_ext_predicate instruction_ext_predicate;
instruction_ext_predicate.Type = TGSI_INSTRUCTION_EXT_TYPE_PREDICATE;
instruction_ext_predicate.SwizzleX = TGSI_SWIZZLE_X;
instruction_ext_predicate.SwizzleY = TGSI_SWIZZLE_Y;
instruction_ext_predicate.SwizzleZ = TGSI_SWIZZLE_Z;
instruction_ext_predicate.SwizzleW = TGSI_SWIZZLE_W;
instruction_ext_predicate.Negate = 0;
instruction_ext_predicate.SrcIndex = 0;
instruction_ext_predicate.Padding = 0;
instruction_ext_predicate.Extended = 0;
return instruction_ext_predicate;
}
unsigned
tgsi_compare_instruction_ext_predicate(struct tgsi_instruction_ext_predicate a,
struct tgsi_instruction_ext_predicate b)
{
a.Padding = b.Padding = 0;
a.Extended = b.Extended = 0;
return compare32(&a, &b);
}
struct tgsi_instruction_ext_predicate
tgsi_build_instruction_ext_predicate(unsigned index,
unsigned negate,
unsigned swizzleX,
unsigned swizzleY,
unsigned swizzleZ,
unsigned swizzleW,
struct tgsi_token *prev_token,
struct tgsi_instruction *instruction,
struct tgsi_header *header)
{
struct tgsi_instruction_ext_predicate instruction_ext_predicate;
instruction_ext_predicate = tgsi_default_instruction_ext_predicate();
instruction_ext_predicate.SwizzleX = swizzleX;
instruction_ext_predicate.SwizzleY = swizzleY;
instruction_ext_predicate.SwizzleZ = swizzleZ;
instruction_ext_predicate.SwizzleW = swizzleW;
instruction_ext_predicate.Negate = negate;
instruction_ext_predicate.SrcIndex = index;
prev_token->Extended = 1;
instruction_grow(instruction, header);
return instruction_ext_predicate;
}
struct tgsi_src_register
tgsi_default_src_register( void )
{
@ -1148,77 +1103,12 @@ tgsi_default_full_dst_register( void )
full_dst_register.DstRegister = tgsi_default_dst_register();
full_dst_register.DstRegisterInd = tgsi_default_src_register();
full_dst_register.DstRegisterExtConcode =
tgsi_default_dst_register_ext_concode();
full_dst_register.DstRegisterExtModulate =
tgsi_default_dst_register_ext_modulate();
return full_dst_register;
}
struct tgsi_dst_register_ext_concode
tgsi_default_dst_register_ext_concode( void )
{
struct tgsi_dst_register_ext_concode dst_register_ext_concode;
dst_register_ext_concode.Type = TGSI_DST_REGISTER_EXT_TYPE_CONDCODE;
dst_register_ext_concode.CondMask = TGSI_CC_TR;
dst_register_ext_concode.CondSwizzleX = TGSI_SWIZZLE_X;
dst_register_ext_concode.CondSwizzleY = TGSI_SWIZZLE_Y;
dst_register_ext_concode.CondSwizzleZ = TGSI_SWIZZLE_Z;
dst_register_ext_concode.CondSwizzleW = TGSI_SWIZZLE_W;
dst_register_ext_concode.CondSrcIndex = 0;
dst_register_ext_concode.Padding = 0;
dst_register_ext_concode.Extended = 0;
return dst_register_ext_concode;
}
unsigned
tgsi_compare_dst_register_ext_concode(
struct tgsi_dst_register_ext_concode a,
struct tgsi_dst_register_ext_concode b )
{
a.Padding = b.Padding = 0;
a.Extended = b.Extended = 0;
return compare32(&a, &b);
}
struct tgsi_dst_register_ext_concode
tgsi_build_dst_register_ext_concode(
unsigned cc,
unsigned swizzle_x,
unsigned swizzle_y,
unsigned swizzle_z,
unsigned swizzle_w,
int index,
struct tgsi_token *prev_token,
struct tgsi_instruction *instruction,
struct tgsi_header *header )
{
struct tgsi_dst_register_ext_concode dst_register_ext_concode;
assert( cc <= TGSI_CC_FL );
assert( swizzle_x <= TGSI_SWIZZLE_W );
assert( swizzle_y <= TGSI_SWIZZLE_W );
assert( swizzle_z <= TGSI_SWIZZLE_W );
assert( swizzle_w <= TGSI_SWIZZLE_W );
assert( index >= -32768 && index <= 32767 );
dst_register_ext_concode = tgsi_default_dst_register_ext_concode();
dst_register_ext_concode.CondMask = cc;
dst_register_ext_concode.CondSwizzleX = swizzle_x;
dst_register_ext_concode.CondSwizzleY = swizzle_y;
dst_register_ext_concode.CondSwizzleZ = swizzle_z;
dst_register_ext_concode.CondSwizzleW = swizzle_w;
dst_register_ext_concode.CondSrcIndex = index;
prev_token->Extended = 1;
instruction_grow( instruction, header );
return dst_register_ext_concode;
}
struct tgsi_dst_register_ext_modulate
tgsi_default_dst_register_ext_modulate( void )
{

62
src/gallium/auxiliary/tgsi/tgsi_build.h
View file

@ -157,30 +157,6 @@ tgsi_build_full_instruction(
struct tgsi_header *header,
unsigned maxsize );
struct tgsi_instruction_ext_nv
tgsi_default_instruction_ext_nv( void );
unsigned
tgsi_compare_instruction_ext_nv(
struct tgsi_instruction_ext_nv a,
struct tgsi_instruction_ext_nv b );
struct tgsi_instruction_ext_nv
tgsi_build_instruction_ext_nv(
unsigned precision,
unsigned cond_dst_index,
unsigned cond_flow_index,
unsigned cond_mask,
unsigned cond_swizzle_x,
unsigned cond_swizzle_y,
unsigned cond_swizzle_z,
unsigned cond_swizzle_w,
unsigned cond_dst_update,
unsigned cond_flow_enable,
struct tgsi_token *prev_token,
struct tgsi_instruction *instruction,
struct tgsi_header *header );
struct tgsi_instruction_ext_label
tgsi_default_instruction_ext_label( void );
@ -211,6 +187,24 @@ tgsi_build_instruction_ext_texture(
struct tgsi_instruction *instruction,
struct tgsi_header *header );
struct tgsi_instruction_ext_predicate
tgsi_default_instruction_ext_predicate(void);
unsigned
tgsi_compare_instruction_ext_predicate(struct tgsi_instruction_ext_predicate a,
struct tgsi_instruction_ext_predicate b);
struct tgsi_instruction_ext_predicate
tgsi_build_instruction_ext_predicate(unsigned index,
unsigned negate,
unsigned swizzleX,
unsigned swizzleY,
unsigned swizzleZ,
unsigned swizzleW,
struct tgsi_token *prev_token,
struct tgsi_instruction *instruction,
struct tgsi_header *header);
struct tgsi_src_register
tgsi_default_src_register( void );
@ -275,26 +269,6 @@ tgsi_build_dst_register(
struct tgsi_full_dst_register
tgsi_default_full_dst_register( void );
struct tgsi_dst_register_ext_concode
tgsi_default_dst_register_ext_concode( void );
unsigned
tgsi_compare_dst_register_ext_concode(
struct tgsi_dst_register_ext_concode a,
struct tgsi_dst_register_ext_concode b );
struct tgsi_dst_register_ext_concode
tgsi_build_dst_register_ext_concode(
unsigned cc,
unsigned swizzle_x,
unsigned swizzle_y,
unsigned swizzle_z,
unsigned swizzle_w,
int index,
struct tgsi_token *prev_token,
struct tgsi_instruction *instruction,
struct tgsi_header *header );
struct tgsi_dst_register_ext_modulate
tgsi_default_dst_register_ext_modulate( void );

3
src/gallium/auxiliary/tgsi/tgsi_dump.c
View file

@ -100,7 +100,8 @@ static const char *file_names[TGSI_FILE_COUNT] =
"SAMP",
"ADDR",
"IMM",
"LOOP"
"LOOP",
"PRED"
};
static const char *interpolate_names[] =

120
src/gallium/auxiliary/tgsi/tgsi_dump_c.c
View file

@ -79,7 +79,8 @@ static const char *TGSI_FILES[TGSI_FILE_COUNT] =
"FILE_SAMPLER",
"FILE_ADDRESS",
"FILE_IMMEDIATE",
"FILE_LOOP"
"FILE_LOOP",
"FILE_PREDICATE"
};
static const char *TGSI_INTERPOLATES[] =
@ -114,32 +115,11 @@ static const char *TGSI_SATS[] =
static const char *TGSI_INSTRUCTION_EXTS[] =
{
"INSTRUCTION_EXT_TYPE_NV",
"",
"INSTRUCTION_EXT_TYPE_LABEL",
"INSTRUCTION_EXT_TYPE_TEXTURE"
};
static const char *TGSI_PRECISIONS[] =
{
"PRECISION_DEFAULT",
"PRECISION_FLOAT32",
"PRECISION_FLOAT16",
"PRECISION_FIXED12"
};
static const char *TGSI_CCS[] =
{
"CC_GT",
"CC_EQ",
"CC_LT",
"CC_UN",
"CC_GE",
"CC_LE",
"CC_NE",
"CC_TR",
"CC_FL"
};
static const char *TGSI_SWIZZLES[] =
{
"SWIZZLE_X",
@ -189,7 +169,7 @@ static const char *TGSI_WRITEMASKS[] =
static const char *TGSI_DST_REGISTER_EXTS[] =
{
"DST_REGISTER_EXT_TYPE_CONDCODE",
"",
"DST_REGISTER_EXT_TYPE_MODULATE"
};
@ -317,60 +297,6 @@ dump_instruction_verbose(
UIX( inst->Instruction.Padding );
}
if( deflt || tgsi_compare_instruction_ext_nv( inst->InstructionExtNv, fi->InstructionExtNv ) ) {
EOL();
TXT( "\nType : " );
ENM( inst->InstructionExtNv.Type, TGSI_INSTRUCTION_EXTS );
if( deflt || fi->InstructionExtNv.Precision != inst->InstructionExtNv.Precision ) {
TXT( "\nPrecision : " );
ENM( inst->InstructionExtNv.Precision, TGSI_PRECISIONS );
}
if( deflt || fi->InstructionExtNv.CondDstIndex != inst->InstructionExtNv.CondDstIndex ) {
TXT( "\nCondDstIndex : " );
UID( inst->InstructionExtNv.CondDstIndex );
}
if( deflt || fi->InstructionExtNv.CondFlowIndex != inst->InstructionExtNv.CondFlowIndex ) {
TXT( "\nCondFlowIndex : " );
UID( inst->InstructionExtNv.CondFlowIndex );
}
if( deflt || fi->InstructionExtNv.CondMask != inst->InstructionExtNv.CondMask ) {
TXT( "\nCondMask : " );
ENM( inst->InstructionExtNv.CondMask, TGSI_CCS );
}
if( deflt || fi->InstructionExtNv.CondSwizzleX != inst->InstructionExtNv.CondSwizzleX ) {
TXT( "\nCondSwizzleX : " );
ENM( inst->InstructionExtNv.CondSwizzleX, TGSI_SWIZZLES );
}
if( deflt || fi->InstructionExtNv.CondSwizzleY != inst->InstructionExtNv.CondSwizzleY ) {
TXT( "\nCondSwizzleY : " );
ENM( inst->InstructionExtNv.CondSwizzleY, TGSI_SWIZZLES );
}
if( deflt || fi->InstructionExtNv.CondSwizzleZ != inst->InstructionExtNv.CondSwizzleZ ) {
TXT( "\nCondSwizzleZ : " );
ENM( inst->InstructionExtNv.CondSwizzleZ, TGSI_SWIZZLES );
}
if( deflt || fi->InstructionExtNv.CondSwizzleW != inst->InstructionExtNv.CondSwizzleW ) {
TXT( "\nCondSwizzleW : " );
ENM( inst->InstructionExtNv.CondSwizzleW, TGSI_SWIZZLES );
}
if( deflt || fi->InstructionExtNv.CondDstUpdate != inst->InstructionExtNv.CondDstUpdate ) {
TXT( "\nCondDstUpdate : " );
UID( inst->InstructionExtNv.CondDstUpdate );
}
if( deflt || fi->InstructionExtNv.CondFlowEnable != inst->InstructionExtNv.CondFlowEnable ) {
TXT( "\nCondFlowEnable: " );
UID( inst->InstructionExtNv.CondFlowEnable );
}
if( ignored ) {
TXT( "\nPadding : " );
UIX( inst->InstructionExtNv.Padding );
if( deflt || fi->InstructionExtNv.Extended != inst->InstructionExtNv.Extended ) {
TXT( "\nExtended : " );
UID( inst->InstructionExtNv.Extended );
}
}
}
if( deflt || tgsi_compare_instruction_ext_label( inst->InstructionExtLabel, fi->InstructionExtLabel ) ) {
EOL();
TXT( "\nType : " );
@ -441,44 +367,6 @@ dump_instruction_verbose(
}
}
if( deflt || tgsi_compare_dst_register_ext_concode( dst->DstRegisterExtConcode, fd->DstRegisterExtConcode ) ) {
EOL();
TXT( "\nType : " );
ENM( dst->DstRegisterExtConcode.Type, TGSI_DST_REGISTER_EXTS );
if( deflt || fd->DstRegisterExtConcode.CondMask != dst->DstRegisterExtConcode.CondMask ) {
TXT( "\nCondMask : " );
ENM( dst->DstRegisterExtConcode.CondMask, TGSI_CCS );
}
if( deflt || fd->DstRegisterExtConcode.CondSwizzleX != dst->DstRegisterExtConcode.CondSwizzleX ) {
TXT( "\nCondSwizzleX: " );
ENM( dst->DstRegisterExtConcode.CondSwizzleX, TGSI_SWIZZLES );
}
if( deflt || fd->DstRegisterExtConcode.CondSwizzleY != dst->DstRegisterExtConcode.CondSwizzleY ) {
TXT( "\nCondSwizzleY: " );
ENM( dst->DstRegisterExtConcode.CondSwizzleY, TGSI_SWIZZLES );
}
if( deflt || fd->DstRegisterExtConcode.CondSwizzleZ != dst->DstRegisterExtConcode.CondSwizzleZ ) {
TXT( "\nCondSwizzleZ: " );
ENM( dst->DstRegisterExtConcode.CondSwizzleZ, TGSI_SWIZZLES );
}
if( deflt || fd->DstRegisterExtConcode.CondSwizzleW != dst->DstRegisterExtConcode.CondSwizzleW ) {
TXT( "\nCondSwizzleW: " );
ENM( dst->DstRegisterExtConcode.CondSwizzleW, TGSI_SWIZZLES );
}
if( deflt || fd->DstRegisterExtConcode.CondSrcIndex != dst->DstRegisterExtConcode.CondSrcIndex ) {
TXT( "\nCondSrcIndex: " );
UID( dst->DstRegisterExtConcode.CondSrcIndex );
}
if( ignored ) {
TXT( "\nPadding : " );
UIX( dst->DstRegisterExtConcode.Padding );
if( deflt || fd->DstRegisterExtConcode.Extended != dst->DstRegisterExtConcode.Extended ) {
TXT( "\nExtended : " );
UID( dst->DstRegisterExtConcode.Extended );
}
}
}
if( deflt || tgsi_compare_dst_register_ext_modulate( dst->DstRegisterExtModulate, fd->DstRegisterExtModulate ) ) {
EOL();
TXT( "\nType : " );

199
src/gallium/auxiliary/tgsi/tgsi_exec.c
View file

@ -107,6 +107,7 @@
#define TEMP_HALF_I TGSI_EXEC_TEMP_HALF_I
#define TEMP_HALF_C TGSI_EXEC_TEMP_HALF_C
#define TEMP_R0 TGSI_EXEC_TEMP_R0
#define TEMP_P0 TGSI_EXEC_TEMP_P0
#define IS_CHANNEL_ENABLED(INST, CHAN)\
((INST).FullDstRegisters[0].DstRegister.WriteMask & (1 << (CHAN)))
@ -1187,6 +1188,17 @@ fetch_src_file_channel(
chan->u[3] = mach->Addrs[index->i[3]].xyzw[swizzle].u[3];
break;
case TGSI_FILE_PREDICATE:
assert(index->i[0] < TGSI_EXEC_NUM_PREDS);
assert(index->i[1] < TGSI_EXEC_NUM_PREDS);
assert(index->i[2] < TGSI_EXEC_NUM_PREDS);
assert(index->i[3] < TGSI_EXEC_NUM_PREDS);
chan->u[0] = mach->Addrs[0].xyzw[swizzle].u[0];
chan->u[1] = mach->Addrs[0].xyzw[swizzle].u[1];
chan->u[2] = mach->Addrs[0].xyzw[swizzle].u[2];
chan->u[3] = mach->Addrs[0].xyzw[swizzle].u[3];
break;
case TGSI_FILE_OUTPUT:
/* vertex/fragment output vars can be read too */
chan->u[0] = mach->Outputs[index->i[0]].xyzw[swizzle].u[0];
@ -1466,119 +1478,17 @@ store_dest(
dst = &mach->Addrs[index].xyzw[chan_index];
break;
case TGSI_FILE_PREDICATE:
index = reg->DstRegister.Index;
assert(index < TGSI_EXEC_NUM_PREDS);
dst = &mach->Addrs[index].xyzw[chan_index];
break;
default:
assert( 0 );
return;
}
if (inst->InstructionExtNv.CondFlowEnable) {
union tgsi_exec_channel *cc = &mach->Temps[TEMP_CC_I].xyzw[TEMP_CC_C];
uint swizzle;
uint shift;
uint mask;
uint test;
/* Only CC0 supported.
*/
assert( inst->InstructionExtNv.CondFlowIndex < 1 );
switch (chan_index) {
case CHAN_X:
swizzle = inst->InstructionExtNv.CondSwizzleX;
break;
case CHAN_Y:
swizzle = inst->InstructionExtNv.CondSwizzleY;
break;
case CHAN_Z:
swizzle = inst->InstructionExtNv.CondSwizzleZ;
break;
case CHAN_W:
swizzle = inst->InstructionExtNv.CondSwizzleW;
break;
default:
assert( 0 );
return;
}
switch (swizzle) {
case TGSI_SWIZZLE_X:
shift = TGSI_EXEC_CC_X_SHIFT;
mask = TGSI_EXEC_CC_X_MASK;
break;
case TGSI_SWIZZLE_Y:
shift = TGSI_EXEC_CC_Y_SHIFT;
mask = TGSI_EXEC_CC_Y_MASK;
break;
case TGSI_SWIZZLE_Z:
shift = TGSI_EXEC_CC_Z_SHIFT;
mask = TGSI_EXEC_CC_Z_MASK;
break;
case TGSI_SWIZZLE_W:
shift = TGSI_EXEC_CC_W_SHIFT;
mask = TGSI_EXEC_CC_W_MASK;
break;
default:
assert( 0 );
return;
}
switch (inst->InstructionExtNv.CondMask) {
case TGSI_CC_GT:
test = ~(TGSI_EXEC_CC_GT << shift) & mask;
for (i = 0; i < QUAD_SIZE; i++)
if (cc->u[i] & test)
execmask &= ~(1 << i);
break;
case TGSI_CC_EQ:
test = ~(TGSI_EXEC_CC_EQ << shift) & mask;
for (i = 0; i < QUAD_SIZE; i++)
if (cc->u[i] & test)
execmask &= ~(1 << i);
break;
case TGSI_CC_LT:
test = ~(TGSI_EXEC_CC_LT << shift) & mask;
for (i = 0; i < QUAD_SIZE; i++)
if (cc->u[i] & test)
execmask &= ~(1 << i);
break;
case TGSI_CC_GE:
test = ~((TGSI_EXEC_CC_GT | TGSI_EXEC_CC_EQ) << shift) & mask;
for (i = 0; i < QUAD_SIZE; i++)
if (cc->u[i] & test)
execmask &= ~(1 << i);
break;
case TGSI_CC_LE:
test = ~((TGSI_EXEC_CC_LT | TGSI_EXEC_CC_EQ) << shift) & mask;
for (i = 0; i < QUAD_SIZE; i++)
if (cc->u[i] & test)
execmask &= ~(1 << i);
break;
case TGSI_CC_NE:
test = ~((TGSI_EXEC_CC_GT | TGSI_EXEC_CC_LT | TGSI_EXEC_CC_UN) << shift) & mask;
for (i = 0; i < QUAD_SIZE; i++)
if (cc->u[i] & test)
execmask &= ~(1 << i);
break;
case TGSI_CC_TR:
break;
case TGSI_CC_FL:
for (i = 0; i < QUAD_SIZE; i++)
execmask &= ~(1 << i);
break;
default:
assert( 0 );
return;
}
}
switch (inst->Instruction.Saturate) {
case TGSI_SAT_NONE:
for (i = 0; i < QUAD_SIZE; i++)
@ -1613,51 +1523,6 @@ store_dest(
default:
assert( 0 );
}
if (inst->InstructionExtNv.CondDstUpdate) {
union tgsi_exec_channel *cc = &mach->Temps[TEMP_CC_I].xyzw[TEMP_CC_C];
uint shift;
uint mask;
/* Only CC0 supported.
*/
assert( inst->InstructionExtNv.CondDstIndex < 1 );
switch (chan_index) {
case CHAN_X:
shift = TGSI_EXEC_CC_X_SHIFT;
mask = ~TGSI_EXEC_CC_X_MASK;
break;
case CHAN_Y:
shift = TGSI_EXEC_CC_Y_SHIFT;
mask = ~TGSI_EXEC_CC_Y_MASK;
break;
case CHAN_Z:
shift = TGSI_EXEC_CC_Z_SHIFT;
mask = ~TGSI_EXEC_CC_Z_MASK;
break;
case CHAN_W:
shift = TGSI_EXEC_CC_W_SHIFT;
mask = ~TGSI_EXEC_CC_W_MASK;
break;
default:
assert( 0 );
return;
}
for (i = 0; i < QUAD_SIZE; i++)
if (execmask & (1 << i)) {
cc->u[i] &= mask;
if (dst->f[i] < 0.0f)
cc->u[i] |= TGSI_EXEC_CC_LT << shift;
else if (dst->f[i] > 0.0f)
cc->u[i] |= TGSI_EXEC_CC_GT << shift;
else if (dst->f[i] == 0.0f)
cc->u[i] |= TGSI_EXEC_CC_EQ << shift;
else
cc->u[i] |= TGSI_EXEC_CC_UN << shift;
}
}
}
#define FETCH(VAL,INDEX,CHAN)\
@ -1717,32 +1582,8 @@ exec_kilp(struct tgsi_exec_machine *mach,
{
uint kilmask; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
if (inst->InstructionExtNv.CondFlowEnable) {
uint swizzle[4];
uint chan_index;
kilmask = 0x0;
swizzle[0] = inst->InstructionExtNv.CondSwizzleX;
swizzle[1] = inst->InstructionExtNv.CondSwizzleY;
swizzle[2] = inst->InstructionExtNv.CondSwizzleZ;
swizzle[3] = inst->InstructionExtNv.CondSwizzleW;
for (chan_index = 0; chan_index < 4; chan_index++)
{
uint i;
for (i = 0; i < 4; i++) {
/* TODO: evaluate the condition code */
if (0)
kilmask |= 1 << i;
}
}
}
else {
/* "unconditional" kil */
kilmask = mach->ExecMask;
}
/* "unconditional" kil */
kilmask = mach->ExecMask;
mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0] |= kilmask;
}

7
src/gallium/auxiliary/tgsi/tgsi_exec.h
View file

@ -168,7 +168,12 @@ struct tgsi_exec_labels
#define TGSI_EXEC_TEMP_ADDR (TGSI_EXEC_NUM_TEMPS + 8)
#define TGSI_EXEC_NUM_ADDRS 1
#define TGSI_EXEC_NUM_TEMP_EXTRAS 9
/* predicate register */
#define TGSI_EXEC_TEMP_P0 (TGSI_EXEC_NUM_TEMPS + 9)
#define TGSI_EXEC_NUM_PREDS 1
#define TGSI_EXEC_NUM_TEMP_EXTRAS 10

13
src/gallium/auxiliary/tgsi/tgsi_parse.c
View file

@ -181,10 +181,6 @@ tgsi_parse_token(
next_token( ctx, &token );
switch( token.Type ) {
case TGSI_INSTRUCTION_EXT_TYPE_NV:
copy_token(&inst->InstructionExtNv, &token);
break;
case TGSI_INSTRUCTION_EXT_TYPE_LABEL:
copy_token(&inst->InstructionExtLabel, &token);
break;
@ -193,6 +189,10 @@ tgsi_parse_token(
copy_token(&inst->InstructionExtTexture, &token);
break;
case TGSI_INSTRUCTION_EXT_TYPE_PREDICATE:
copy_token(&inst->InstructionExtPredicate, &token);
break;
default:
assert( 0 );
}
@ -220,11 +220,6 @@ tgsi_parse_token(
next_token( ctx, &token );
switch( token.Type ) {
case TGSI_DST_REGISTER_EXT_TYPE_CONDCODE:
copy_token(&inst->FullDstRegisters[i].DstRegisterExtConcode,
&token);
break;
case TGSI_DST_REGISTER_EXT_TYPE_MODULATE:
copy_token(&inst->FullDstRegisters[i].DstRegisterExtModulate,
&token);

3
src/gallium/auxiliary/tgsi/tgsi_parse.h
View file

@ -49,7 +49,6 @@ struct tgsi_full_dst_register
{
struct tgsi_dst_register DstRegister;
struct tgsi_src_register DstRegisterInd;
struct tgsi_dst_register_ext_concode DstRegisterExtConcode;
struct tgsi_dst_register_ext_modulate DstRegisterExtModulate;
};
@ -81,9 +80,9 @@ struct tgsi_full_immediate
struct tgsi_full_instruction
{
struct tgsi_instruction Instruction;
struct tgsi_instruction_ext_nv InstructionExtNv;
struct tgsi_instruction_ext_label InstructionExtLabel;
struct tgsi_instruction_ext_texture InstructionExtTexture;
struct tgsi_instruction_ext_predicate InstructionExtPredicate;
struct tgsi_full_dst_register FullDstRegisters[TGSI_FULL_MAX_DST_REGISTERS];
struct tgsi_full_src_register FullSrcRegisters[TGSI_FULL_MAX_SRC_REGISTERS];
uint Flags; /**< user-defined usage */

3
src/gallium/auxiliary/tgsi/tgsi_sanity.c
View file

@ -141,7 +141,8 @@ static const char *file_names[TGSI_FILE_COUNT] =
"SAMP",
"ADDR",
"IMM",
"LOOP"
"LOOP",
"PRED"
};
static boolean

3
src/gallium/auxiliary/tgsi/tgsi_text.c
View file

@ -232,7 +232,8 @@ static const char *file_names[TGSI_FILE_COUNT] =
"SAMP",
"ADDR",
"IMM",
"LOOP"
"LOOP",
"PRED"
};
static boolean