fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-01 18:58:10 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

intel/compiler: Pass single backend_shader argument to the vec4_live_variables constructor

Browse source 
The IR analysis framework requires the analysis result to be
constructible with a single argument.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
This commit is contained in:
Francisco Jerez 2016-03-13 16:41:45 -07:00 • committed by Matt Turner
parent d0433971f9
commit a9cdc14f60
2 changed files with 6 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
src/intel/compiler/brw_vec4_live_variables.cpp
View file

@ -215,9 +215,8 @@ vec4_live_variables::compute_start_end()
}
}
vec4_live_variables::vec4_live_variables(const simple_allocator &alloc,
cfg_t *cfg)
: alloc(alloc), cfg(cfg)
vec4_live_variables::vec4_live_variables(const backend_shader *s)
: alloc(s->alloc), cfg(s->cfg)
{
mem_ctx = ralloc_context(NULL);
@ -282,7 +281,7 @@ vec4_visitor::calculate_live_intervals()
* The control flow-aware analysis was done at a channel level, while at
* this point we're distilling it down to vgrfs.
*/
this->live_intervals = new(mem_ctx) vec4_live_variables(alloc, cfg);
this->live_intervals = new(mem_ctx) vec4_live_variables(this);
}
void

4
src/intel/compiler/brw_vec4_live_variables.h
View file

@ -31,6 +31,8 @@
#include "brw_ir_vec4.h"
#include "util/bitset.h"
struct backend_shader;
namespace brw {
class vec4_live_variables {
@ -63,7 +65,7 @@ public:
DECLARE_RALLOC_CXX_OPERATORS(vec4_live_variables)
vec4_live_variables(const simple_allocator &alloc, cfg_t *cfg);
vec4_live_variables(const backend_shader *s);
~vec4_live_variables();
int num_vars;