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nvc0: bind driver constbuf for compute on Fermi
Changes from v3: - add new validation state for COMPUTE driver constbuf Changes from v2: - always bind the driver consts even if user params come in via clover Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
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5 changed files with 29 additions and 0 deletions
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@ -196,6 +196,22 @@ nvc0_compute_validate_constbufs(struct nvc0_context *nvc0)
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PUSH_DATA (push, NVC0_COMPUTE_FLUSH_CB);
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}
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static void
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nvc0_compute_validate_driverconst(struct nvc0_context *nvc0)
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{
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struct nouveau_pushbuf *push = nvc0->base.pushbuf;
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struct nvc0_screen *screen = nvc0->screen;
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BEGIN_NVC0(push, NVC0_COMPUTE(CB_SIZE), 3);
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PUSH_DATA (push, 1024);
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PUSH_DATAh(push, screen->uniform_bo->offset + (6 << 16) + (5 << 10));
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PUSH_DATA (push, screen->uniform_bo->offset + (6 << 16) + (5 << 10));
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BEGIN_NVC0(push, NVC0_COMPUTE(CB_BIND), 1);
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PUSH_DATA (push, (15 << 8) | 1);
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nvc0->dirty |= NVC0_NEW_DRIVERCONST;
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}
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static bool
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nvc0_compute_state_validate(struct nvc0_context *nvc0)
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{
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@ -203,6 +219,8 @@ nvc0_compute_state_validate(struct nvc0_context *nvc0)
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return false;
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if (nvc0->dirty_cp & NVC0_NEW_CP_CONSTBUF)
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nvc0_compute_validate_constbufs(nvc0);
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if (nvc0->dirty_cp & NVC0_NEW_CP_DRIVERCONST)
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nvc0_compute_validate_driverconst(nvc0);
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/* TODO: textures, samplers, surfaces, global memory buffers */
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@ -349,6 +349,11 @@ nvc0_create(struct pipe_screen *pscreen, void *priv, unsigned ctxflags)
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/* set the empty tctl prog on next draw in case one is never set */
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nvc0->dirty |= NVC0_NEW_TCTLPROG;
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/* Do not bind the COMPUTE driver constbuf at screen initialization because
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* CBs are aliased between 3D and COMPUTE, but make sure it will be bound if
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* a grid is launched later. */
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nvc0->dirty_cp |= NVC0_NEW_CP_DRIVERCONST;
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/* now that there are no more opportunities for errors, set the current
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* context if there isn't already one.
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*/
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@ -368,6 +373,7 @@ nvc0_create(struct pipe_screen *pscreen, void *priv, unsigned ctxflags)
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BCTX_REFN_bo(nvc0->bufctx_3d, SCREEN, flags, screen->txc);
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if (screen->compute) {
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BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->text);
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BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->uniform_bo);
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BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->txc);
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BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->parm);
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}
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@ -65,6 +65,7 @@
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#define NVC0_NEW_CP_SAMPLERS (1 << 3)
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#define NVC0_NEW_CP_CONSTBUF (1 << 4)
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#define NVC0_NEW_CP_GLOBALS (1 << 5)
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#define NVC0_NEW_CP_DRIVERCONST (1 << 6)
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/* 3d bufctx (during draw_vbo, blit_3d) */
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#define NVC0_BIND_FB 0
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@ -544,6 +544,8 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t chipset,
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info->io.texBindBase = NVE4_CP_INPUT_TEX(0);
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info->io.suInfoBase = NVE4_CP_INPUT_SUF(0);
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info->prop.cp.gridInfoBase = NVE4_CP_INPUT_GRID_INFO(0);
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} else {
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info->io.resInfoCBSlot = 15;
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}
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info->io.msInfoCBSlot = 0;
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info->io.msInfoBase = NVE4_CP_INPUT_MS_OFFSETS;
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@ -555,6 +555,8 @@ nvc0_validate_driverconst(struct nvc0_context *nvc0)
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BEGIN_NVC0(push, NVC0_3D(CB_BIND(i)), 1);
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PUSH_DATA (push, (15 << 4) | 1);
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}
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nvc0->dirty_cp |= NVC0_NEW_CP_DRIVERCONST;
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}
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void
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