From a969ad1ddfd6b0b94cc484da45293c407203e3ac Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Tue, 24 Aug 2021 18:09:53 -0700 Subject: [PATCH] iris: Demote DC flush to HDC flush in cache tracker FLUSH_HDC is sufficient to flush things out to L3, so we'd rather use that where possible. It's also emulated via DATA_CACHE_FLUSH on platforms where it isn't supported, so we can use it unconditionally. We still use DATA_CACHE_FLUSH for invalidating the data cache, and to flush the DC-tagged cachelines in L3 to be globally-observable. Reviewed-by: Rohan Garg Reviewed-by: Francisco Jerez Part-of: --- src/gallium/drivers/iris/iris_pipe_control.c | 4 ++-- src/gallium/drivers/iris/iris_state.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/iris/iris_pipe_control.c b/src/gallium/drivers/iris/iris_pipe_control.c index bf6cf5909b1..95b1b5bc33b 100644 --- a/src/gallium/drivers/iris/iris_pipe_control.c +++ b/src/gallium/drivers/iris/iris_pipe_control.c @@ -195,7 +195,7 @@ iris_emit_buffer_barrier_for(struct iris_batch *batch, const uint32_t flush_bits[NUM_IRIS_DOMAINS] = { [IRIS_DOMAIN_RENDER_WRITE] = PIPE_CONTROL_RENDER_TARGET_FLUSH, [IRIS_DOMAIN_DEPTH_WRITE] = PIPE_CONTROL_DEPTH_CACHE_FLUSH, - [IRIS_DOMAIN_DATA_WRITE] = PIPE_CONTROL_DATA_CACHE_FLUSH, + [IRIS_DOMAIN_DATA_WRITE] = PIPE_CONTROL_FLUSH_HDC, [IRIS_DOMAIN_OTHER_WRITE] = PIPE_CONTROL_FLUSH_ENABLE, [IRIS_DOMAIN_VF_READ] = PIPE_CONTROL_STALL_AT_SCOREBOARD, [IRIS_DOMAIN_SAMPLER_READ] = PIPE_CONTROL_STALL_AT_SCOREBOARD, @@ -205,7 +205,7 @@ iris_emit_buffer_barrier_for(struct iris_batch *batch, const uint32_t invalidate_bits[NUM_IRIS_DOMAINS] = { [IRIS_DOMAIN_RENDER_WRITE] = PIPE_CONTROL_RENDER_TARGET_FLUSH, [IRIS_DOMAIN_DEPTH_WRITE] = PIPE_CONTROL_DEPTH_CACHE_FLUSH, - [IRIS_DOMAIN_DATA_WRITE] = PIPE_CONTROL_DATA_CACHE_FLUSH, + [IRIS_DOMAIN_DATA_WRITE] = PIPE_CONTROL_FLUSH_HDC, [IRIS_DOMAIN_OTHER_WRITE] = PIPE_CONTROL_FLUSH_ENABLE, [IRIS_DOMAIN_VF_READ] = PIPE_CONTROL_VF_CACHE_INVALIDATE, [IRIS_DOMAIN_SAMPLER_READ] = PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE, diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index c52f927976f..fa99bfa68cd 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -7640,7 +7640,7 @@ batch_mark_sync_for_pipe_control(struct iris_batch *batch, uint32_t flags) if ((flags & PIPE_CONTROL_DEPTH_CACHE_FLUSH)) iris_batch_mark_invalidate_sync(batch, IRIS_DOMAIN_DEPTH_WRITE); - if ((flags & PIPE_CONTROL_DATA_CACHE_FLUSH)) + if (flags & (PIPE_CONTROL_FLUSH_HDC | PIPE_CONTROL_DATA_CACHE_FLUSH)) iris_batch_mark_invalidate_sync(batch, IRIS_DOMAIN_DATA_WRITE); if ((flags & PIPE_CONTROL_FLUSH_ENABLE))