mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-24 01:58:16 +02:00
jay: hack for sample position
Adding this to the list of design constraints for the next RA rework. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41688>
This commit is contained in:
parent
1e31be0e52
commit
a9525f4b44
1 changed files with 12 additions and 0 deletions
|
|
@ -11,6 +11,7 @@
|
|||
#include "nir.h"
|
||||
#include "nir_builder.h"
|
||||
#include "nir_intrinsics.h"
|
||||
#include "shader_enums.h"
|
||||
|
||||
/*
|
||||
* Jay-to-NIR relies on a careful indexing of defs: every 32-bit word has
|
||||
|
|
@ -260,6 +261,17 @@ jay_process_nir(const struct intel_device_info *devinfo,
|
|||
/* TODO: Real heuristic */
|
||||
bool do_simd32 = INTEL_SIMD(FS, 32);
|
||||
do_simd32 &= stage == MESA_SHADER_COMPUTE || stage == MESA_SHADER_FRAGMENT;
|
||||
|
||||
/* TODO: The SIMD32 fragment payload is even more fragmented than RA
|
||||
* currently models when sample position is read. RA needs a rework to handle
|
||||
* the real partitions in a proper way (this is planned soon).
|
||||
*
|
||||
* Hot fix for
|
||||
* dEQP-GLES31.functional.shaders.sample_variables.sample_pos.correctness.multisample_texture_4
|
||||
*/
|
||||
do_simd32 &=
|
||||
!BITSET_TEST(nir->info.system_values_read, SYSTEM_VALUE_SAMPLE_POS);
|
||||
|
||||
unsigned simd_width = do_simd32 ? (nir->info.api_subgroup_size ?: 32) : 16;
|
||||
|
||||
if (stage == MESA_SHADER_VERTEX) {
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue