fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-03 16:28:08 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

gm107/ir: allow indirect inputs to be loaded by frag shader

Browse source 
Looks like the GM107 IPA op does not allow a separate offset when
using an indirect register. Instead we must use AL2P like we do for
indirect vertex operations on Kepler+.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
This commit is contained in:
Ilia Mirkin 2016-09-08 02:13:56 -04:00
parent a22aee5ad1
commit a8c0c7301c
2 changed files with 21 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

25
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
View file

@ -2695,13 +2695,30 @@ NVC0LoweringPass::visit(Instruction *i)
/* Kepler+ has a special opcode to compute a new base address to be used
* for indirect loads.
*
* Maxwell+ has an additional similar requirement for indirect
* interpolation ops in frag shaders.
*/
if (targ->getChipset() >= NVISA_GK104_CHIPSET && !i->perPatch &&
(i->op == OP_VFETCH || i->op == OP_EXPORT) && i->src(0).isIndirect(0)) {
bool doAfetch = false;
if (targ->getChipset() >= NVISA_GK104_CHIPSET &&
!i->perPatch &&
(i->op == OP_VFETCH || i->op == OP_EXPORT) &&
i->src(0).isIndirect(0)) {
doAfetch = true;
}
if (targ->getChipset() >= NVISA_GM107_CHIPSET &&
(i->op == OP_LINTERP || i->op == OP_PINTERP) &&
i->src(0).isIndirect(0)) {
doAfetch = true;
}
if (doAfetch) {
Value *addr = cloneShallow(func, i->getSrc(0));
Instruction *afetch = bld.mkOp1(OP_AFETCH, TYPE_U32, bld.getSSA(),
cloneShallow(func, i->getSrc(0)));
i->getSrc(0));
afetch->setIndirect(0, 0, i->getIndirect(0, 0));
i->src(0).get()->reg.data.offset = 0;
addr->reg.data.offset = 0;
i->setSrc(0, addr);
i->setIndirect(0, 0, afetch->getDef(0));
}

1
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
View file

@ -349,7 +349,6 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
return shader != PIPE_SHADER_FRAGMENT;
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
return shader != PIPE_SHADER_FRAGMENT || class_3d < GM107_3D_CLASS;
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
return 1;