diff --git a/src/panfrost/compiler/meson.build b/src/panfrost/compiler/meson.build index 5c0f258d139..bf183b71277 100644 --- a/src/panfrost/compiler/meson.build +++ b/src/panfrost/compiler/meson.build @@ -15,7 +15,6 @@ libpanfrost_compiler_files = files( 'pan_nir_lower_sample_position.c', 'pan_nir_lower_store_component.c', 'pan_nir_lower_vertex_id.c', - 'pan_nir_lower_writeout.c', 'pan_nir_lower_xfb.c', ) diff --git a/src/panfrost/compiler/midgard/compiler.h b/src/panfrost/compiler/midgard/compiler.h index 4786dcaaa15..e28cbd68563 100644 --- a/src/panfrost/compiler/midgard/compiler.h +++ b/src/panfrost/compiler/midgard/compiler.h @@ -86,6 +86,11 @@ typedef struct midgard_branch { #define MIR_SRC_COUNT 4 #define MIR_VEC_COMPONENTS 16 +#define MIR_WRITEOUT_C 1 +#define MIR_WRITEOUT_Z 2 +#define MIR_WRITEOUT_S 4 +#define MIR_WRITEOUT_2 8 + typedef struct midgard_instruction { /* Must be first for casting */ struct list_head link; diff --git a/src/panfrost/compiler/midgard/meson.build b/src/panfrost/compiler/midgard/meson.build index 6196f74ddcf..e0fba07de2d 100644 --- a/src/panfrost/compiler/midgard/meson.build +++ b/src/panfrost/compiler/midgard/meson.build @@ -18,6 +18,7 @@ libpanfrost_midgard_files = files( 'mir_promote_uniforms.c', 'mir_squeeze.c', 'midgard_nir_lower_image_bitsize.c', + 'midgard_nir_lower_writeout.c', 'midgard_nir_type_csel.c', 'midgard_opt_copy_prop.c', 'midgard_opt_dce.c', diff --git a/src/panfrost/compiler/midgard/midgard_compile.c b/src/panfrost/compiler/midgard/midgard_compile.c index a722cde7666..f98087bbdd3 100644 --- a/src/panfrost/compiler/midgard/midgard_compile.c +++ b/src/panfrost/compiler/midgard/midgard_compile.c @@ -432,7 +432,7 @@ midgard_postprocess_nir(nir_shader *nir, UNUSED unsigned gpu_id) } NIR_PASS(_, nir, nir_lower_ssbo, NULL); - NIR_PASS(_, nir, pan_nir_lower_zs_store); + NIR_PASS(_, nir, midgard_nir_lower_zs_store); NIR_PASS(_, nir, nir_lower_frexp); NIR_PASS(_, nir, midgard_nir_lower_global_load); @@ -1499,7 +1499,7 @@ emit_fragment_store(compiler_context *ctx, unsigned src, unsigned src_z, bool depth_only = (rt == MIDGARD_ZS_RT); - ins.writeout = depth_only ? 0 : PAN_WRITEOUT_C; + ins.writeout = depth_only ? 0 : MIR_WRITEOUT_C; /* Add dependencies */ ins.src[0] = src; @@ -1517,13 +1517,13 @@ emit_fragment_store(compiler_context *ctx, unsigned src, unsigned src_z, emit_explicit_constant(ctx, src_z); ins.src[2] = src_z; ins.src_types[2] = nir_type_uint32; - ins.writeout |= PAN_WRITEOUT_Z; + ins.writeout |= MIR_WRITEOUT_Z; } if (~src_s) { emit_explicit_constant(ctx, src_s); ins.src[3] = src_s; ins.src_types[3] = nir_type_uint32; - ins.writeout |= PAN_WRITEOUT_S; + ins.writeout |= MIR_WRITEOUT_S; } /* Emit the branch */ @@ -1836,18 +1836,18 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr) enum midgard_rt_id rt; unsigned reg_z = ~0, reg_s = ~0, reg_2 = ~0; - unsigned writeout = PAN_WRITEOUT_C; + unsigned writeout = MIR_WRITEOUT_C; if (combined) { writeout = nir_intrinsic_component(instr); - if (writeout & PAN_WRITEOUT_Z) + if (writeout & MIR_WRITEOUT_Z) reg_z = nir_src_index(ctx, &instr->src[2]); - if (writeout & PAN_WRITEOUT_S) + if (writeout & MIR_WRITEOUT_S) reg_s = nir_src_index(ctx, &instr->src[3]); - if (writeout & PAN_WRITEOUT_2) + if (writeout & MIR_WRITEOUT_2) reg_2 = nir_src_index(ctx, &instr->src[4]); } - if (writeout & PAN_WRITEOUT_C) { + if (writeout & MIR_WRITEOUT_C) { nir_io_semantics sem = nir_intrinsic_io_semantics(instr); rt = MIDGARD_COLOR_RT0 + (sem.location - FRAG_RESULT_DATA0); diff --git a/src/panfrost/compiler/midgard/midgard_nir.h b/src/panfrost/compiler/midgard/midgard_nir.h index 62976c97cd1..d816001545d 100644 --- a/src/panfrost/compiler/midgard/midgard_nir.h +++ b/src/panfrost/compiler/midgard/midgard_nir.h @@ -6,3 +6,4 @@ bool midgard_nir_lower_algebraic_late(nir_shader *shader); bool midgard_nir_cancel_inot(nir_shader *shader); bool midgard_nir_type_csel(nir_shader *shader); bool midgard_nir_lower_image_bitsize(nir_shader *shader); +bool midgard_nir_lower_zs_store(nir_shader *nir); diff --git a/src/panfrost/compiler/pan_nir_lower_writeout.c b/src/panfrost/compiler/midgard/midgard_nir_lower_writeout.c similarity index 94% rename from src/panfrost/compiler/pan_nir_lower_writeout.c rename to src/panfrost/compiler/midgard/midgard_nir_lower_writeout.c index bfe16713bc8..e6feaa0d227 100644 --- a/src/panfrost/compiler/pan_nir_lower_writeout.c +++ b/src/panfrost/compiler/midgard/midgard_nir_lower_writeout.c @@ -22,16 +22,13 @@ * SOFTWARE. */ -#include "compiler/nir/nir_builder.h" -#include "pan_nir.h" +#include "compiler.h" +#include "midgard_nir.h" +#include "nir_builder.h" /* Midgard can write all of color, depth and stencil in a single writeout * operation, so we merge depth/stencil stores with color stores. * If there are no color stores, we add a write to the "depth RT". - * - * For Bifrost, we want these combined so we can properly order - * +ZS_EMIT with respect to +ATEST and +BLEND, as well as combining - * depth/stencil stores into a single +ZS_EMIT op. */ /* @@ -94,7 +91,7 @@ kill_depth_stencil_writes(nir_builder *b, nir_intrinsic_instr *intr, } bool -pan_nir_lower_zs_store(nir_shader *nir) +midgard_nir_lower_zs_store(nir_shader *nir) { bool progress = false; @@ -124,14 +121,14 @@ pan_nir_lower_zs_store(nir_shader *nir) nir_io_semantics sem = nir_intrinsic_io_semantics(intr); if (sem.location == FRAG_RESULT_DEPTH) { stores[0] = intr; - writeout |= PAN_WRITEOUT_Z; + writeout |= MIR_WRITEOUT_Z; } else if (sem.location == FRAG_RESULT_STENCIL) { stores[1] = intr; - writeout |= PAN_WRITEOUT_S; + writeout |= MIR_WRITEOUT_S; } else if (sem.dual_source_blend_index) { assert(!stores[2]); /* there should be only 1 source for dual blending */ stores[2] = intr; - writeout |= PAN_WRITEOUT_2; + writeout |= MIR_WRITEOUT_2; } else if (sem.location == FRAG_RESULT_SAMPLE_MASK) { last_mask_store = intr; mask_block = intr->instr.block; @@ -206,7 +203,7 @@ pan_nir_lower_zs_store(nir_shader *nir) /* Trying to write depth twice results in the * wrong blend shader being executed on * Midgard */ - unsigned this_store = PAN_WRITEOUT_C | (replaced ? 0 : writeout); + unsigned this_store = MIR_WRITEOUT_C | (replaced ? 0 : writeout); pan_nir_emit_combined_store(&b, intr, this_store, stores); diff --git a/src/panfrost/compiler/midgard/midgard_schedule.c b/src/panfrost/compiler/midgard/midgard_schedule.c index f70127428c5..13254343527 100644 --- a/src/panfrost/compiler/midgard/midgard_schedule.c +++ b/src/panfrost/compiler/midgard/midgard_schedule.c @@ -1269,11 +1269,11 @@ mir_schedule_alu(compiler_context *ctx, midgard_instruction **instructions, branch->dest_type = vadd->dest_type; } - if (writeout & PAN_WRITEOUT_Z) + if (writeout & MIR_WRITEOUT_Z) mir_schedule_zs_write(ctx, &predicate, instructions, liveness, worklist, len, branch, &smul, &vadd, &vlut, false); - if (writeout & PAN_WRITEOUT_S) + if (writeout & MIR_WRITEOUT_S) mir_schedule_zs_write(ctx, &predicate, instructions, liveness, worklist, len, branch, &smul, &vadd, &vlut, true); diff --git a/src/panfrost/compiler/pan_compiler.h b/src/panfrost/compiler/pan_compiler.h index 9ed40552067..1c4c789a7c1 100644 --- a/src/panfrost/compiler/pan_compiler.h +++ b/src/panfrost/compiler/pan_compiler.h @@ -372,11 +372,6 @@ uint16_t pan_to_bytemask(unsigned bytes, unsigned mask); /* NIR passes to do some backend-specific lowering */ -#define PAN_WRITEOUT_C 1 -#define PAN_WRITEOUT_Z 2 -#define PAN_WRITEOUT_S 4 -#define PAN_WRITEOUT_2 8 - /* * Helper returning the subgroup size. Generally, this is equal to the number of * threads in a warp. For Midgard (including warping models), this returns 1, as diff --git a/src/panfrost/compiler/pan_nir.h b/src/panfrost/compiler/pan_nir.h index 9f475371204..c568554071f 100644 --- a/src/panfrost/compiler/pan_nir.h +++ b/src/panfrost/compiler/pan_nir.h @@ -30,7 +30,6 @@ struct util_format_description; -bool pan_nir_lower_zs_store(nir_shader *nir); bool pan_nir_lower_store_component(nir_shader *shader); bool pan_nir_lower_vertex_id(nir_shader *shader);