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i965: Rename brw_compile to brw_codegen

Browse source 
This name better matches what it's actually used for.  The patch was
generated with the following command:

for file in *; do
sed -i -e s/brw_compile/brw_codegen/g $file
done

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Jason Ekstrand 2015-04-16 11:06:57 -07:00
parent cfc56fcee3
commit a85c4c9b3f
29 changed files with 245 additions and 245 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/mesa/drivers/dri/i965/brw_clip.c
View file

@ -62,7 +62,7 @@ static void compile_clip_prog( struct brw_context *brw,
/* Begin the compilation:
*/
brw_init_compile(brw->intelScreen->devinfo, &c.func, mem_ctx);
brw_init_codegen(brw->intelScreen->devinfo, &c.func, mem_ctx);
c.func.single_program_flow = 1;

2
src/mesa/drivers/dri/i965/brw_clip.h
View file

@ -74,7 +74,7 @@ struct brw_clip_prog_key {
#define PRIM_MASK (0x1f)
struct brw_clip_compile {
struct brw_compile func;
struct brw_codegen func;
struct brw_clip_prog_key key;
struct brw_clip_prog_data prog_data;

2
src/mesa/drivers/dri/i965/brw_clip_line.c
View file

@ -128,7 +128,7 @@ static void brw_clip_line_alloc_regs( struct brw_clip_compile *c )
*/
static void clip_and_emit_line( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
struct brw_indirect vtx0 = brw_indirect(0, 0);
struct brw_indirect vtx1 = brw_indirect(1, 0);
struct brw_indirect newvtx0 = brw_indirect(2, 0);

16
src/mesa/drivers/dri/i965/brw_clip_tri.c
View file

@ -139,7 +139,7 @@ void brw_clip_tri_alloc_regs( struct brw_clip_compile *c,
void brw_clip_tri_init_vertices( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
struct brw_reg tmp0 = c->reg.loopcount; /* handy temporary */
/* Initial list of indices for incoming vertexes:
@ -179,7 +179,7 @@ void brw_clip_tri_init_vertices( struct brw_clip_compile *c )
void brw_clip_tri_flat_shade( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
struct brw_reg tmp0 = c->reg.loopcount; /* handy temporary */
brw_AND(p, tmp0, get_element_ud(c->reg.R0, 2), brw_imm_ud(PRIM_MASK));
@ -234,7 +234,7 @@ static inline void
load_clip_distance(struct brw_clip_compile *c, struct brw_indirect vtx,
struct brw_reg dst, GLuint hpos_offset, int cond)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
dst = vec4(dst);
brw_AND(p, vec1(brw_null_reg()), c->reg.vertex_src_mask, brw_imm_ud(1));
@ -260,7 +260,7 @@ load_clip_distance(struct brw_clip_compile *c, struct brw_indirect vtx,
*/
void brw_clip_tri( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
struct brw_indirect vtx = brw_indirect(0, 0);
struct brw_indirect vtxPrev = brw_indirect(1, 0);
struct brw_indirect vtxOut = brw_indirect(2, 0);
@ -452,7 +452,7 @@ void brw_clip_tri( struct brw_clip_compile *c )
void brw_clip_tri_emit_polygon(struct brw_clip_compile *c)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
/* for (loopcount = nr_verts-2; loopcount > 0; loopcount--)
*/
@ -508,7 +508,7 @@ static void do_clip_tri( struct brw_clip_compile *c )
static void maybe_do_clip_tri( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_NZ, c->reg.planemask, brw_imm_ud(0));
brw_IF(p, BRW_EXECUTE_1);
@ -533,7 +533,7 @@ static void brw_clip_test( struct brw_clip_compile *c )
struct brw_indirect vt1 = brw_indirect(1, 0);
struct brw_indirect vt2 = brw_indirect(2, 0);
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
struct brw_reg tmp0 = c->reg.loopcount; /* handy temporary */
GLuint hpos_offset = brw_varying_to_offset(&c->vue_map,
@ -629,7 +629,7 @@ static void brw_clip_test( struct brw_clip_compile *c )
void brw_emit_tri_clip( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
brw_clip_tri_alloc_regs(c, 3 + c->key.nr_userclip + 6);
brw_clip_tri_init_vertices(c);
brw_clip_init_clipmask(c);

22
src/mesa/drivers/dri/i965/brw_clip_unfilled.c
View file

@ -49,7 +49,7 @@ BZZZT!
*/
static void compute_tri_direction( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
struct brw_reg e = c->reg.tmp0;
struct brw_reg f = c->reg.tmp1;
GLuint hpos_offset = brw_varying_to_offset(&c->vue_map, VARYING_SLOT_POS);
@ -96,7 +96,7 @@ static void compute_tri_direction( struct brw_clip_compile *c )
static void cull_direction( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
GLuint conditional;
assert (!(c->key.fill_ccw == CLIP_CULL &&
@ -124,7 +124,7 @@ static void cull_direction( struct brw_clip_compile *c )
static void copy_bfc( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
GLuint conditional;
/* Do we have any colors to copy?
@ -192,7 +192,7 @@ static void copy_bfc( struct brw_clip_compile *c )
*/
static void compute_offset( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
struct brw_reg off = c->reg.offset;
struct brw_reg dir = c->reg.dir;
@ -216,7 +216,7 @@ static void compute_offset( struct brw_clip_compile *c )
static void merge_edgeflags( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
struct brw_reg tmp0 = get_element_ud(c->reg.tmp0, 0);
brw_AND(p, tmp0, get_element_ud(c->reg.R0, 2), brw_imm_ud(PRIM_MASK));
@ -255,7 +255,7 @@ static void merge_edgeflags( struct brw_clip_compile *c )
static void apply_one_offset( struct brw_clip_compile *c,
struct brw_indirect vert )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
GLuint ndc_offset = brw_varying_to_offset(&c->vue_map,
BRW_VARYING_SLOT_NDC);
struct brw_reg z = deref_1f(vert, ndc_offset +
@ -272,7 +272,7 @@ static void apply_one_offset( struct brw_clip_compile *c,
static void emit_lines(struct brw_clip_compile *c,
bool do_offset)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
struct brw_indirect v0 = brw_indirect(0, 0);
struct brw_indirect v1 = brw_indirect(1, 0);
struct brw_indirect v0ptr = brw_indirect(2, 0);
@ -342,7 +342,7 @@ static void emit_lines(struct brw_clip_compile *c,
static void emit_points(struct brw_clip_compile *c,
bool do_offset )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
struct brw_indirect v0 = brw_indirect(0, 0);
struct brw_indirect v0ptr = brw_indirect(2, 0);
@ -412,7 +412,7 @@ static void emit_primitives( struct brw_clip_compile *c,
static void emit_unfilled_primitives( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
/* Direction culling has already been done.
*/
@ -449,7 +449,7 @@ static void emit_unfilled_primitives( struct brw_clip_compile *c )
static void check_nr_verts( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.nr_verts, brw_imm_d(3));
brw_IF(p, BRW_EXECUTE_1);
@ -462,7 +462,7 @@ static void check_nr_verts( struct brw_clip_compile *c )
void brw_emit_unfilled_clip( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
c->need_direction = ((c->key.offset_ccw || c->key.offset_cw) ||
(c->key.fill_ccw != c->key.fill_cw) ||

20
src/mesa/drivers/dri/i965/brw_clip_util.c
View file

@ -70,7 +70,7 @@ static struct brw_reg make_plane_ud(GLuint x, GLuint y, GLuint z, GLuint w)
void brw_clip_init_planes( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
if (!c->key.nr_userclip) {
brw_MOV(p, get_element_ud(c->reg.fixed_planes, 0), make_plane_ud( 0, 0, 0xff, 1));
@ -90,7 +90,7 @@ void brw_clip_init_planes( struct brw_clip_compile *c )
*/
void brw_clip_project_position(struct brw_clip_compile *c, struct brw_reg pos )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
/* calc rhw
*/
@ -107,7 +107,7 @@ void brw_clip_project_position(struct brw_clip_compile *c, struct brw_reg pos )
static void brw_clip_project_vertex( struct brw_clip_compile *c,
struct brw_indirect vert_addr )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
struct brw_reg tmp = get_tmp(c);
GLuint hpos_offset = brw_varying_to_offset(&c->vue_map, VARYING_SLOT_POS);
GLuint ndc_offset = brw_varying_to_offset(&c->vue_map,
@ -138,7 +138,7 @@ void brw_clip_interp_vertex( struct brw_clip_compile *c,
struct brw_reg t0,
bool force_edgeflag)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
struct brw_reg t_nopersp, v0_ndc_copy;
GLuint slot;
@ -316,7 +316,7 @@ void brw_clip_emit_vue(struct brw_clip_compile *c,
enum brw_urb_write_flags flags,
GLuint header)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
bool allocate = flags & BRW_URB_WRITE_ALLOCATE;
brw_clip_ff_sync(c);
@ -357,7 +357,7 @@ void brw_clip_emit_vue(struct brw_clip_compile *c,
void brw_clip_kill_thread(struct brw_clip_compile *c)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
brw_clip_ff_sync(c);
/* Send an empty message to kill the thread and release any
@ -400,7 +400,7 @@ struct brw_reg brw_clip_plane_stride( struct brw_clip_compile *c )
void brw_clip_copy_flatshaded_attributes( struct brw_clip_compile *c,
GLuint to, GLuint from )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
for (int i = 0; i < c->vue_map.num_slots; i++) {
if (c->key.interpolation_mode.mode[i] == INTERP_QUALIFIER_FLAT) {
@ -415,7 +415,7 @@ void brw_clip_copy_flatshaded_attributes( struct brw_clip_compile *c,
void brw_clip_init_clipmask( struct brw_clip_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
struct brw_reg incoming = get_element_ud(c->reg.R0, 2);
/* Shift so that lowest outcode bit is rightmost:
@ -442,7 +442,7 @@ void brw_clip_init_clipmask( struct brw_clip_compile *c )
void brw_clip_ff_sync(struct brw_clip_compile *c)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
if (p->devinfo->gen == 5) {
brw_AND(p, brw_null_reg(), c->reg.ff_sync, brw_imm_ud(0x1));
@ -465,7 +465,7 @@ void brw_clip_ff_sync(struct brw_clip_compile *c)
void brw_clip_init_ff_sync(struct brw_clip_compile *c)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
if (p->devinfo->gen == 5) {
brw_MOV(p, c->reg.ff_sync, brw_imm_ud(0));

28
src/mesa/drivers/dri/i965/brw_eu.c
View file

@ -111,22 +111,22 @@ brw_swap_cmod(uint32_t cmod)
}
void
brw_set_default_exec_size(struct brw_compile *p, unsigned value)
brw_set_default_exec_size(struct brw_codegen *p, unsigned value)
{
brw_inst_set_exec_size(p->devinfo, p->current, value);
}
void brw_set_default_predicate_control( struct brw_compile *p, unsigned pc )
void brw_set_default_predicate_control( struct brw_codegen *p, unsigned pc )
{
brw_inst_set_pred_control(p->devinfo, p->current, pc);
}
void brw_set_default_predicate_inverse(struct brw_compile *p, bool predicate_inverse)
void brw_set_default_predicate_inverse(struct brw_codegen *p, bool predicate_inverse)
{
brw_inst_set_pred_inv(p->devinfo, p->current, predicate_inverse);
}
void brw_set_default_flag_reg(struct brw_compile *p, int reg, int subreg)
void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg)
{
if (p->devinfo->gen >= 7)
brw_inst_set_flag_reg_nr(p->devinfo, p->current, reg);
@ -134,13 +134,13 @@ void brw_set_default_flag_reg(struct brw_compile *p, int reg, int subreg)
brw_inst_set_flag_subreg_nr(p->devinfo, p->current, subreg);
}
void brw_set_default_access_mode( struct brw_compile *p, unsigned access_mode )
void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode )
{
brw_inst_set_access_mode(p->devinfo, p->current, access_mode);
}
void
brw_set_default_compression_control(struct brw_compile *p,
brw_set_default_compression_control(struct brw_codegen *p,
enum brw_compression compression_control)
{
p->compressed = (compression_control == BRW_COMPRESSION_COMPRESSED);
@ -174,23 +174,23 @@ brw_set_default_compression_control(struct brw_compile *p,
}
}
void brw_set_default_mask_control( struct brw_compile *p, unsigned value )
void brw_set_default_mask_control( struct brw_codegen *p, unsigned value )
{
brw_inst_set_mask_control(p->devinfo, p->current, value);
}
void brw_set_default_saturate( struct brw_compile *p, bool enable )
void brw_set_default_saturate( struct brw_codegen *p, bool enable )
{
brw_inst_set_saturate(p->devinfo, p->current, enable);
}
void brw_set_default_acc_write_control(struct brw_compile *p, unsigned value)
void brw_set_default_acc_write_control(struct brw_codegen *p, unsigned value)
{
if (p->devinfo->gen >= 6)
brw_inst_set_acc_wr_control(p->devinfo, p->current, value);
}
void brw_push_insn_state( struct brw_compile *p )
void brw_push_insn_state( struct brw_codegen *p )
{
assert(p->current != &p->stack[BRW_EU_MAX_INSN_STACK-1]);
memcpy(p->current + 1, p->current, sizeof(brw_inst));
@ -198,7 +198,7 @@ void brw_push_insn_state( struct brw_compile *p )
p->current++;
}
void brw_pop_insn_state( struct brw_compile *p )
void brw_pop_insn_state( struct brw_codegen *p )
{
assert(p->current != p->stack);
p->current--;
@ -209,8 +209,8 @@ void brw_pop_insn_state( struct brw_compile *p )
/***********************************************************************
*/
void
brw_init_compile(const struct brw_device_info *devinfo,
struct brw_compile *p, void *mem_ctx)
brw_init_codegen(const struct brw_device_info *devinfo,
struct brw_codegen *p, void *mem_ctx)
{
memset(p, 0, sizeof(*p));
@ -250,7 +250,7 @@ brw_init_compile(const struct brw_device_info *devinfo,
}
const unsigned *brw_get_program( struct brw_compile *p,
const unsigned *brw_get_program( struct brw_codegen *p,
unsigned *sz )
{
*sz = p->next_insn_offset;

126
src/mesa/drivers/dri/i965/brw_eu.h
View file

@ -53,7 +53,7 @@ extern "C" {
*/
#define brw_last_inst (&p->store[p->nr_insn - 1])
struct brw_compile {
struct brw_codegen {
brw_inst *store;
int store_size;
unsigned nr_insn;
@ -97,54 +97,54 @@ struct brw_compile {
int loop_stack_array_size;
};
void brw_pop_insn_state( struct brw_compile *p );
void brw_push_insn_state( struct brw_compile *p );
void brw_set_default_exec_size(struct brw_compile *p, unsigned value);
void brw_set_default_mask_control( struct brw_compile *p, unsigned value );
void brw_set_default_saturate( struct brw_compile *p, bool enable );
void brw_set_default_access_mode( struct brw_compile *p, unsigned access_mode );
void brw_set_default_compression_control(struct brw_compile *p, enum brw_compression c);
void brw_set_default_predicate_control( struct brw_compile *p, unsigned pc );
void brw_set_default_predicate_inverse(struct brw_compile *p, bool predicate_inverse);
void brw_set_default_flag_reg(struct brw_compile *p, int reg, int subreg);
void brw_set_default_acc_write_control(struct brw_compile *p, unsigned value);
void brw_pop_insn_state( struct brw_codegen *p );
void brw_push_insn_state( struct brw_codegen *p );
void brw_set_default_exec_size(struct brw_codegen *p, unsigned value);
void brw_set_default_mask_control( struct brw_codegen *p, unsigned value );
void brw_set_default_saturate( struct brw_codegen *p, bool enable );
void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode );
void brw_set_default_compression_control(struct brw_codegen *p, enum brw_compression c);
void brw_set_default_predicate_control( struct brw_codegen *p, unsigned pc );
void brw_set_default_predicate_inverse(struct brw_codegen *p, bool predicate_inverse);
void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg);
void brw_set_default_acc_write_control(struct brw_codegen *p, unsigned value);
void brw_init_compile(const struct brw_device_info *, struct brw_compile *p,
void brw_init_codegen(const struct brw_device_info *, struct brw_codegen *p,
void *mem_ctx);
void brw_disassemble(const struct brw_device_info *devinfo, void *assembly,
int start, int end, FILE *out);
const unsigned *brw_get_program( struct brw_compile *p, unsigned *sz );
const unsigned *brw_get_program( struct brw_codegen *p, unsigned *sz );
brw_inst *brw_next_insn(struct brw_compile *p, unsigned opcode);
void brw_set_dest(struct brw_compile *p, brw_inst *insn, struct brw_reg dest);
void brw_set_src0(struct brw_compile *p, brw_inst *insn, struct brw_reg reg);
brw_inst *brw_next_insn(struct brw_codegen *p, unsigned opcode);
void brw_set_dest(struct brw_codegen *p, brw_inst *insn, struct brw_reg dest);
void brw_set_src0(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
void gen6_resolve_implied_move(struct brw_compile *p,
void gen6_resolve_implied_move(struct brw_codegen *p,
struct brw_reg *src,
unsigned msg_reg_nr);
/* Helpers for regular instructions:
*/
#define ALU1(OP) \
brw_inst *brw_##OP(struct brw_compile *p, \
brw_inst *brw_##OP(struct brw_codegen *p, \
struct brw_reg dest, \
struct brw_reg src0);
#define ALU2(OP) \
brw_inst *brw_##OP(struct brw_compile *p, \
brw_inst *brw_##OP(struct brw_codegen *p, \
struct brw_reg dest, \
struct brw_reg src0, \
struct brw_reg src1);
#define ALU3(OP) \
brw_inst *brw_##OP(struct brw_compile *p, \
brw_inst *brw_##OP(struct brw_codegen *p, \
struct brw_reg dest, \
struct brw_reg src0, \
struct brw_reg src1, \
struct brw_reg src2);
#define ROUND(OP) \
void brw_##OP(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0);
void brw_##OP(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0);
ALU1(MOV)
ALU2(SEL)
@ -195,7 +195,7 @@ ROUND(RNDE)
/* Helpers for SEND instruction:
*/
void brw_set_sampler_message(struct brw_compile *p,
void brw_set_sampler_message(struct brw_codegen *p,
brw_inst *insn,
unsigned binding_table_index,
unsigned sampler,
@ -206,7 +206,7 @@ void brw_set_sampler_message(struct brw_compile *p,
unsigned simd_mode,
unsigned return_format);
void brw_set_dp_read_message(struct brw_compile *p,
void brw_set_dp_read_message(struct brw_codegen *p,
brw_inst *insn,
unsigned binding_table_index,
unsigned msg_control,
@ -216,7 +216,7 @@ void brw_set_dp_read_message(struct brw_compile *p,
bool header_present,
unsigned response_length);
void brw_set_dp_write_message(struct brw_compile *p,
void brw_set_dp_write_message(struct brw_codegen *p,
brw_inst *insn,
unsigned binding_table_index,
unsigned msg_control,
@ -228,7 +228,7 @@ void brw_set_dp_write_message(struct brw_compile *p,
unsigned end_of_thread,
unsigned send_commit_msg);
void brw_urb_WRITE(struct brw_compile *p,
void brw_urb_WRITE(struct brw_codegen *p,
struct brw_reg dest,
unsigned msg_reg_nr,
struct brw_reg src0,
@ -248,13 +248,13 @@ void brw_urb_WRITE(struct brw_compile *p,
* instruction.
*/
struct brw_inst *
brw_send_indirect_message(struct brw_compile *p,
brw_send_indirect_message(struct brw_codegen *p,
unsigned sfid,
struct brw_reg dst,
struct brw_reg payload,
struct brw_reg desc);
void brw_ff_sync(struct brw_compile *p,
void brw_ff_sync(struct brw_codegen *p,
struct brw_reg dest,
unsigned msg_reg_nr,
struct brw_reg src0,
@ -262,14 +262,14 @@ void brw_ff_sync(struct brw_compile *p,
unsigned response_length,
bool eot);
void brw_svb_write(struct brw_compile *p,
void brw_svb_write(struct brw_codegen *p,
struct brw_reg dest,
unsigned msg_reg_nr,
struct brw_reg src0,
unsigned binding_table_index,
bool send_commit_msg);
void brw_fb_WRITE(struct brw_compile *p,
void brw_fb_WRITE(struct brw_codegen *p,
int dispatch_width,
struct brw_reg payload,
struct brw_reg implied_header,
@ -281,7 +281,7 @@ void brw_fb_WRITE(struct brw_compile *p,
bool last_render_target,
bool header_present);
void brw_SAMPLE(struct brw_compile *p,
void brw_SAMPLE(struct brw_codegen *p,
struct brw_reg dest,
unsigned msg_reg_nr,
struct brw_reg src0,
@ -294,46 +294,46 @@ void brw_SAMPLE(struct brw_compile *p,
unsigned simd_mode,
unsigned return_format);
void brw_adjust_sampler_state_pointer(struct brw_compile *p,
void brw_adjust_sampler_state_pointer(struct brw_codegen *p,
struct brw_reg header,
struct brw_reg sampler_index);
void gen4_math(struct brw_compile *p,
void gen4_math(struct brw_codegen *p,
struct brw_reg dest,
unsigned function,
unsigned msg_reg_nr,
struct brw_reg src,
unsigned precision );
void gen6_math(struct brw_compile *p,
void gen6_math(struct brw_codegen *p,
struct brw_reg dest,
unsigned function,
struct brw_reg src0,
struct brw_reg src1);
void brw_oword_block_read(struct brw_compile *p,
void brw_oword_block_read(struct brw_codegen *p,
struct brw_reg dest,
struct brw_reg mrf,
uint32_t offset,
uint32_t bind_table_index);
void brw_oword_block_read_scratch(struct brw_compile *p,
void brw_oword_block_read_scratch(struct brw_codegen *p,
struct brw_reg dest,
struct brw_reg mrf,
int num_regs,
unsigned offset);
void brw_oword_block_write_scratch(struct brw_compile *p,
void brw_oword_block_write_scratch(struct brw_codegen *p,
struct brw_reg mrf,
int num_regs,
unsigned offset);
void gen7_block_read_scratch(struct brw_compile *p,
void gen7_block_read_scratch(struct brw_codegen *p,
struct brw_reg dest,
int num_regs,
unsigned offset);
void brw_shader_time_add(struct brw_compile *p,
void brw_shader_time_add(struct brw_codegen *p,
struct brw_reg payload,
uint32_t surf_index);
@ -364,43 +364,43 @@ brw_jump_scale(const struct brw_device_info *devinfo)
/* If/else/endif. Works by manipulating the execution flags on each
* channel.
*/
brw_inst *brw_IF(struct brw_compile *p, unsigned execute_size);
brw_inst *gen6_IF(struct brw_compile *p, enum brw_conditional_mod conditional,
brw_inst *brw_IF(struct brw_codegen *p, unsigned execute_size);
brw_inst *gen6_IF(struct brw_codegen *p, enum brw_conditional_mod conditional,
struct brw_reg src0, struct brw_reg src1);
void brw_ELSE(struct brw_compile *p);
void brw_ENDIF(struct brw_compile *p);
void brw_ELSE(struct brw_codegen *p);
void brw_ENDIF(struct brw_codegen *p);
/* DO/WHILE loops:
*/
brw_inst *brw_DO(struct brw_compile *p, unsigned execute_size);
brw_inst *brw_DO(struct brw_codegen *p, unsigned execute_size);
brw_inst *brw_WHILE(struct brw_compile *p);
brw_inst *brw_WHILE(struct brw_codegen *p);
brw_inst *brw_BREAK(struct brw_compile *p);
brw_inst *brw_CONT(struct brw_compile *p);
brw_inst *gen6_HALT(struct brw_compile *p);
brw_inst *brw_BREAK(struct brw_codegen *p);
brw_inst *brw_CONT(struct brw_codegen *p);
brw_inst *gen6_HALT(struct brw_codegen *p);
/* Forward jumps:
*/
void brw_land_fwd_jump(struct brw_compile *p, int jmp_insn_idx);
void brw_land_fwd_jump(struct brw_codegen *p, int jmp_insn_idx);
brw_inst *brw_JMPI(struct brw_compile *p, struct brw_reg index,
brw_inst *brw_JMPI(struct brw_codegen *p, struct brw_reg index,
unsigned predicate_control);
void brw_NOP(struct brw_compile *p);
void brw_NOP(struct brw_codegen *p);
/* Special case: there is never a destination, execution size will be
* taken from src0:
*/
void brw_CMP(struct brw_compile *p,
void brw_CMP(struct brw_codegen *p,
struct brw_reg dest,
unsigned conditional,
struct brw_reg src0,
struct brw_reg src1);
void
brw_untyped_atomic(struct brw_compile *p,
brw_untyped_atomic(struct brw_codegen *p,
struct brw_reg dest,
struct brw_reg payload,
unsigned atomic_op,
@ -409,7 +409,7 @@ brw_untyped_atomic(struct brw_compile *p,
bool response_expected);
void
brw_untyped_surface_read(struct brw_compile *p,
brw_untyped_surface_read(struct brw_codegen *p,
struct brw_reg dest,
struct brw_reg mrf,
unsigned bind_table_index,
@ -417,7 +417,7 @@ brw_untyped_surface_read(struct brw_compile *p,
unsigned num_channels);
void
brw_pixel_interpolator_query(struct brw_compile *p,
brw_pixel_interpolator_query(struct brw_codegen *p,
struct brw_reg dest,
struct brw_reg mrf,
bool noperspective,
@ -430,40 +430,40 @@ brw_pixel_interpolator_query(struct brw_compile *p,
* brw_eu_util.c:
*/
void brw_copy_indirect_to_indirect(struct brw_compile *p,
void brw_copy_indirect_to_indirect(struct brw_codegen *p,
struct brw_indirect dst_ptr,
struct brw_indirect src_ptr,
unsigned count);
void brw_copy_from_indirect(struct brw_compile *p,
void brw_copy_from_indirect(struct brw_codegen *p,
struct brw_reg dst,
struct brw_indirect ptr,
unsigned count);
void brw_copy4(struct brw_compile *p,
void brw_copy4(struct brw_codegen *p,
struct brw_reg dst,
struct brw_reg src,
unsigned count);
void brw_copy8(struct brw_compile *p,
void brw_copy8(struct brw_codegen *p,
struct brw_reg dst,
struct brw_reg src,
unsigned count);
void brw_math_invert( struct brw_compile *p,
void brw_math_invert( struct brw_codegen *p,
struct brw_reg dst,
struct brw_reg src);
void brw_set_src1(struct brw_compile *p, brw_inst *insn, struct brw_reg reg);
void brw_set_src1(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
void brw_set_uip_jip(struct brw_compile *p);
void brw_set_uip_jip(struct brw_codegen *p);
enum brw_conditional_mod brw_negate_cmod(uint32_t cmod);
enum brw_conditional_mod brw_swap_cmod(uint32_t cmod);
/* brw_eu_compact.c */
void brw_init_compaction_tables(const struct brw_device_info *devinfo);
void brw_compact_instructions(struct brw_compile *p, int start_offset,
void brw_compact_instructions(struct brw_codegen *p, int start_offset,
int num_annotations, struct annotation *annotation);
void brw_uncompact_instruction(const struct brw_device_info *devinfo,
brw_inst *dst, brw_compact_inst *src);

2
src/mesa/drivers/dri/i965/brw_eu_compact.c
View file

@ -1362,7 +1362,7 @@ brw_init_compaction_tables(const struct brw_device_info *devinfo)
}
void
brw_compact_instructions(struct brw_compile *p, int start_offset,
brw_compact_instructions(struct brw_codegen *p, int start_offset,
int num_annotations, struct annotation *annotation)
{
const struct brw_device_info *devinfo = p->devinfo;

144
src/mesa/drivers/dri/i965/brw_eu_emit.c
View file

@ -44,7 +44,7 @@
* explicit move; it should be called before emitting a SEND instruction.
*/
void
gen6_resolve_implied_move(struct brw_compile *p,
gen6_resolve_implied_move(struct brw_codegen *p,
struct brw_reg *src,
unsigned msg_reg_nr)
{
@ -68,7 +68,7 @@ gen6_resolve_implied_move(struct brw_compile *p,
}
static void
gen7_convert_mrf_to_grf(struct brw_compile *p, struct brw_reg *reg)
gen7_convert_mrf_to_grf(struct brw_codegen *p, struct brw_reg *reg)
{
/* From the Ivybridge PRM, Volume 4 Part 3, page 218 ("send"):
* "The send with EOT should use register space R112-R127 for <src>. This is
@ -142,7 +142,7 @@ brw_reg_type_to_hw_type(const struct brw_device_info *devinfo,
}
void
brw_set_dest(struct brw_compile *p, brw_inst *inst, struct brw_reg dest)
brw_set_dest(struct brw_codegen *p, brw_inst *inst, struct brw_reg dest)
{
const struct brw_device_info *devinfo = p->devinfo;
@ -296,7 +296,7 @@ is_compactable_immediate(unsigned imm)
}
void
brw_set_src0(struct brw_compile *p, brw_inst *inst, struct brw_reg reg)
brw_set_src0(struct brw_codegen *p, brw_inst *inst, struct brw_reg reg)
{
const struct brw_device_info *devinfo = p->devinfo;
@ -436,7 +436,7 @@ brw_set_src0(struct brw_compile *p, brw_inst *inst, struct brw_reg reg)
void
brw_set_src1(struct brw_compile *p, brw_inst *inst, struct brw_reg reg)
brw_set_src1(struct brw_codegen *p, brw_inst *inst, struct brw_reg reg)
{
const struct brw_device_info *devinfo = p->devinfo;
@ -515,7 +515,7 @@ brw_set_src1(struct brw_compile *p, brw_inst *inst, struct brw_reg reg)
* choose not to fill in irrelevant bits; they will be zero.
*/
static void
brw_set_message_descriptor(struct brw_compile *p,
brw_set_message_descriptor(struct brw_codegen *p,
brw_inst *inst,
enum brw_message_target sfid,
unsigned msg_length,
@ -548,7 +548,7 @@ brw_set_message_descriptor(struct brw_compile *p,
}
}
static void brw_set_math_message( struct brw_compile *p,
static void brw_set_math_message( struct brw_codegen *p,
brw_inst *inst,
unsigned function,
unsigned integer_type,
@ -595,7 +595,7 @@ static void brw_set_math_message( struct brw_compile *p,
}
static void brw_set_ff_sync_message(struct brw_compile *p,
static void brw_set_ff_sync_message(struct brw_codegen *p,
brw_inst *insn,
bool allocate,
unsigned response_length,
@ -614,7 +614,7 @@ static void brw_set_ff_sync_message(struct brw_compile *p,
brw_inst_set_urb_complete(devinfo, insn, 0);
}
static void brw_set_urb_message( struct brw_compile *p,
static void brw_set_urb_message( struct brw_codegen *p,
brw_inst *insn,
enum brw_urb_write_flags flags,
unsigned msg_length,
@ -656,7 +656,7 @@ static void brw_set_urb_message( struct brw_compile *p,
}
void
brw_set_dp_write_message(struct brw_compile *p,
brw_set_dp_write_message(struct brw_codegen *p,
brw_inst *insn,
unsigned binding_table_index,
unsigned msg_control,
@ -697,7 +697,7 @@ brw_set_dp_write_message(struct brw_compile *p,
}
void
brw_set_dp_read_message(struct brw_compile *p,
brw_set_dp_read_message(struct brw_codegen *p,
brw_inst *insn,
unsigned binding_table_index,
unsigned msg_control,
@ -732,7 +732,7 @@ brw_set_dp_read_message(struct brw_compile *p,
}
void
brw_set_sampler_message(struct brw_compile *p,
brw_set_sampler_message(struct brw_codegen *p,
brw_inst *inst,
unsigned binding_table_index,
unsigned sampler,
@ -759,7 +759,7 @@ brw_set_sampler_message(struct brw_compile *p,
}
static void
gen7_set_dp_scratch_message(struct brw_compile *p,
gen7_set_dp_scratch_message(struct brw_codegen *p,
brw_inst *inst,
bool write,
bool dword,
@ -785,7 +785,7 @@ gen7_set_dp_scratch_message(struct brw_compile *p,
#define next_insn brw_next_insn
brw_inst *
brw_next_insn(struct brw_compile *p, unsigned opcode)
brw_next_insn(struct brw_codegen *p, unsigned opcode)
{
const struct brw_device_info *devinfo = p->devinfo;
brw_inst *insn;
@ -804,7 +804,7 @@ brw_next_insn(struct brw_compile *p, unsigned opcode)
}
static brw_inst *
brw_alu1(struct brw_compile *p, unsigned opcode,
brw_alu1(struct brw_codegen *p, unsigned opcode,
struct brw_reg dest, struct brw_reg src)
{
brw_inst *insn = next_insn(p, opcode);
@ -814,7 +814,7 @@ brw_alu1(struct brw_compile *p, unsigned opcode,
}
static brw_inst *
brw_alu2(struct brw_compile *p, unsigned opcode,
brw_alu2(struct brw_codegen *p, unsigned opcode,
struct brw_reg dest, struct brw_reg src0, struct brw_reg src1)
{
brw_inst *insn = next_insn(p, opcode);
@ -836,7 +836,7 @@ get_3src_subreg_nr(struct brw_reg reg)
}
static brw_inst *
brw_alu3(struct brw_compile *p, unsigned opcode, struct brw_reg dest,
brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest,
struct brw_reg src0, struct brw_reg src1, struct brw_reg src2)
{
const struct brw_device_info *devinfo = p->devinfo;
@ -925,7 +925,7 @@ brw_alu3(struct brw_compile *p, unsigned opcode, struct brw_reg dest,
* Convenience routines.
*/
#define ALU1(OP) \
brw_inst *brw_##OP(struct brw_compile *p, \
brw_inst *brw_##OP(struct brw_codegen *p, \
struct brw_reg dest, \
struct brw_reg src0) \
{ \
@ -933,7 +933,7 @@ brw_inst *brw_##OP(struct brw_compile *p, \
}
#define ALU2(OP) \
brw_inst *brw_##OP(struct brw_compile *p, \
brw_inst *brw_##OP(struct brw_codegen *p, \
struct brw_reg dest, \
struct brw_reg src0, \
struct brw_reg src1) \
@ -942,7 +942,7 @@ brw_inst *brw_##OP(struct brw_compile *p, \
}
#define ALU3(OP) \
brw_inst *brw_##OP(struct brw_compile *p, \
brw_inst *brw_##OP(struct brw_codegen *p, \
struct brw_reg dest, \
struct brw_reg src0, \
struct brw_reg src1, \
@ -952,7 +952,7 @@ brw_inst *brw_##OP(struct brw_compile *p, \
}
#define ALU3F(OP) \
brw_inst *brw_##OP(struct brw_compile *p, \
brw_inst *brw_##OP(struct brw_codegen *p, \
struct brw_reg dest, \
struct brw_reg src0, \
struct brw_reg src1, \
@ -973,7 +973,7 @@ brw_inst *brw_##OP(struct brw_compile *p, \
* Sandybridge and later appear to round correctly without an ADD.
*/
#define ROUND(OP) \
void brw_##OP(struct brw_compile *p, \
void brw_##OP(struct brw_codegen *p, \
struct brw_reg dest, \
struct brw_reg src) \
{ \
@ -1027,7 +1027,7 @@ ROUND(RNDE)
brw_inst *
brw_ADD(struct brw_compile *p, struct brw_reg dest,
brw_ADD(struct brw_codegen *p, struct brw_reg dest,
struct brw_reg src0, struct brw_reg src1)
{
/* 6.2.2: add */
@ -1049,7 +1049,7 @@ brw_ADD(struct brw_compile *p, struct brw_reg dest,
}
brw_inst *
brw_AVG(struct brw_compile *p, struct brw_reg dest,
brw_AVG(struct brw_codegen *p, struct brw_reg dest,
struct brw_reg src0, struct brw_reg src1)
{
assert(dest.type == src0.type);
@ -1070,7 +1070,7 @@ brw_AVG(struct brw_compile *p, struct brw_reg dest,
}
brw_inst *
brw_MUL(struct brw_compile *p, struct brw_reg dest,
brw_MUL(struct brw_codegen *p, struct brw_reg dest,
struct brw_reg src0, struct brw_reg src1)
{
/* 6.32.38: mul */
@ -1104,7 +1104,7 @@ brw_MUL(struct brw_compile *p, struct brw_reg dest,
}
brw_inst *
brw_LINE(struct brw_compile *p, struct brw_reg dest,
brw_LINE(struct brw_codegen *p, struct brw_reg dest,
struct brw_reg src0, struct brw_reg src1)
{
src0.vstride = BRW_VERTICAL_STRIDE_0;
@ -1114,7 +1114,7 @@ brw_LINE(struct brw_compile *p, struct brw_reg dest,
}
brw_inst *
brw_PLN(struct brw_compile *p, struct brw_reg dest,
brw_PLN(struct brw_codegen *p, struct brw_reg dest,
struct brw_reg src0, struct brw_reg src1)
{
src0.vstride = BRW_VERTICAL_STRIDE_0;
@ -1127,7 +1127,7 @@ brw_PLN(struct brw_compile *p, struct brw_reg dest,
}
brw_inst *
brw_F32TO16(struct brw_compile *p, struct brw_reg dst, struct brw_reg src)
brw_F32TO16(struct brw_codegen *p, struct brw_reg dst, struct brw_reg src)
{
const struct brw_device_info *devinfo = p->devinfo;
const bool align16 = brw_inst_access_mode(devinfo, p->current) == BRW_ALIGN_16;
@ -1174,7 +1174,7 @@ brw_F32TO16(struct brw_compile *p, struct brw_reg dst, struct brw_reg src)
}
brw_inst *
brw_F16TO32(struct brw_compile *p, struct brw_reg dst, struct brw_reg src)
brw_F16TO32(struct brw_codegen *p, struct brw_reg dst, struct brw_reg src)
{
const struct brw_device_info *devinfo = p->devinfo;
bool align16 = brw_inst_access_mode(devinfo, p->current) == BRW_ALIGN_16;
@ -1205,7 +1205,7 @@ brw_F16TO32(struct brw_compile *p, struct brw_reg dst, struct brw_reg src)
}
void brw_NOP(struct brw_compile *p)
void brw_NOP(struct brw_codegen *p)
{
brw_inst *insn = next_insn(p, BRW_OPCODE_NOP);
brw_set_dest(p, insn, retype(brw_vec4_grf(0,0), BRW_REGISTER_TYPE_UD));
@ -1222,7 +1222,7 @@ void brw_NOP(struct brw_compile *p)
*/
brw_inst *
brw_JMPI(struct brw_compile *p, struct brw_reg index,
brw_JMPI(struct brw_codegen *p, struct brw_reg index,
unsigned predicate_control)
{
const struct brw_device_info *devinfo = p->devinfo;
@ -1238,7 +1238,7 @@ brw_JMPI(struct brw_compile *p, struct brw_reg index,
}
static void
push_if_stack(struct brw_compile *p, brw_inst *inst)
push_if_stack(struct brw_codegen *p, brw_inst *inst)
{
p->if_stack[p->if_stack_depth] = inst - p->store;
@ -1251,14 +1251,14 @@ push_if_stack(struct brw_compile *p, brw_inst *inst)
}
static brw_inst *
pop_if_stack(struct brw_compile *p)
pop_if_stack(struct brw_codegen *p)
{
p->if_stack_depth--;
return &p->store[p->if_stack[p->if_stack_depth]];
}
static void
push_loop_stack(struct brw_compile *p, brw_inst *inst)
push_loop_stack(struct brw_codegen *p, brw_inst *inst)
{
if (p->loop_stack_array_size < p->loop_stack_depth) {
p->loop_stack_array_size *= 2;
@ -1274,7 +1274,7 @@ push_loop_stack(struct brw_compile *p, brw_inst *inst)
}
static brw_inst *
get_inner_do_insn(struct brw_compile *p)
get_inner_do_insn(struct brw_codegen *p)
{
return &p->store[p->loop_stack[p->loop_stack_depth - 1]];
}
@ -1293,7 +1293,7 @@ get_inner_do_insn(struct brw_compile *p)
* popped off. If the stack is now empty, normal execution resumes.
*/
brw_inst *
brw_IF(struct brw_compile *p, unsigned execute_size)
brw_IF(struct brw_codegen *p, unsigned execute_size)
{
const struct brw_device_info *devinfo = p->devinfo;
brw_inst *insn;
@ -1340,7 +1340,7 @@ brw_IF(struct brw_compile *p, unsigned execute_size)
* embedded comparison (conditional modifier). It is not used on gen7.
*/
brw_inst *
gen6_IF(struct brw_compile *p, enum brw_conditional_mod conditional,
gen6_IF(struct brw_codegen *p, enum brw_conditional_mod conditional,
struct brw_reg src0, struct brw_reg src1)
{
const struct brw_device_info *devinfo = p->devinfo;
@ -1367,7 +1367,7 @@ gen6_IF(struct brw_compile *p, enum brw_conditional_mod conditional,
* In single-program-flow (SPF) mode, convert IF and ELSE into ADDs.
*/
static void
convert_IF_ELSE_to_ADD(struct brw_compile *p,
convert_IF_ELSE_to_ADD(struct brw_codegen *p,
brw_inst *if_inst, brw_inst *else_inst)
{
const struct brw_device_info *devinfo = p->devinfo;
@ -1408,7 +1408,7 @@ convert_IF_ELSE_to_ADD(struct brw_compile *p,
* Patch IF and ELSE instructions with appropriate jump targets.
*/
static void
patch_IF_ELSE(struct brw_compile *p,
patch_IF_ELSE(struct brw_codegen *p,
brw_inst *if_inst, brw_inst *else_inst, brw_inst *endif_inst)
{
const struct brw_device_info *devinfo = p->devinfo;
@ -1496,7 +1496,7 @@ patch_IF_ELSE(struct brw_compile *p,
}
void
brw_ELSE(struct brw_compile *p)
brw_ELSE(struct brw_codegen *p)
{
const struct brw_device_info *devinfo = p->devinfo;
brw_inst *insn;
@ -1534,7 +1534,7 @@ brw_ELSE(struct brw_compile *p)
}
void
brw_ENDIF(struct brw_compile *p)
brw_ENDIF(struct brw_codegen *p)
{
const struct brw_device_info *devinfo = p->devinfo;
brw_inst *insn = NULL;
@ -1615,7 +1615,7 @@ brw_ENDIF(struct brw_compile *p)
}
brw_inst *
brw_BREAK(struct brw_compile *p)
brw_BREAK(struct brw_codegen *p)
{
const struct brw_device_info *devinfo = p->devinfo;
brw_inst *insn;
@ -1643,7 +1643,7 @@ brw_BREAK(struct brw_compile *p)
}
brw_inst *
brw_CONT(struct brw_compile *p)
brw_CONT(struct brw_codegen *p)
{
const struct brw_device_info *devinfo = p->devinfo;
brw_inst *insn;
@ -1668,7 +1668,7 @@ brw_CONT(struct brw_compile *p)
}
brw_inst *
gen6_HALT(struct brw_compile *p)
gen6_HALT(struct brw_codegen *p)
{
const struct brw_device_info *devinfo = p->devinfo;
brw_inst *insn;
@ -1708,7 +1708,7 @@ gen6_HALT(struct brw_compile *p)
* just points back to the first instruction of the loop.
*/
brw_inst *
brw_DO(struct brw_compile *p, unsigned execute_size)
brw_DO(struct brw_codegen *p, unsigned execute_size)
{
const struct brw_device_info *devinfo = p->devinfo;
@ -1742,7 +1742,7 @@ brw_DO(struct brw_compile *p, unsigned execute_size)
* nesting, since it can always just point to the end of the block/current loop.
*/
static void
brw_patch_break_cont(struct brw_compile *p, brw_inst *while_inst)
brw_patch_break_cont(struct brw_codegen *p, brw_inst *while_inst)
{
const struct brw_device_info *devinfo = p->devinfo;
brw_inst *do_inst = get_inner_do_insn(p);
@ -1767,7 +1767,7 @@ brw_patch_break_cont(struct brw_compile *p, brw_inst *while_inst)
}
brw_inst *
brw_WHILE(struct brw_compile *p)
brw_WHILE(struct brw_codegen *p)
{
const struct brw_device_info *devinfo = p->devinfo;
brw_inst *insn, *do_insn;
@ -1830,7 +1830,7 @@ brw_WHILE(struct brw_compile *p)
/* FORWARD JUMPS:
*/
void brw_land_fwd_jump(struct brw_compile *p, int jmp_insn_idx)
void brw_land_fwd_jump(struct brw_codegen *p, int jmp_insn_idx)
{
const struct brw_device_info *devinfo = p->devinfo;
brw_inst *jmp_insn = &p->store[jmp_insn_idx];
@ -1850,7 +1850,7 @@ void brw_land_fwd_jump(struct brw_compile *p, int jmp_insn_idx)
* instruction should populate the flag register. It might be simpler
* just to use the flag reg for most WM tasks?
*/
void brw_CMP(struct brw_compile *p,
void brw_CMP(struct brw_codegen *p,
struct brw_reg dest,
unsigned conditional,
struct brw_reg src0,
@ -1885,7 +1885,7 @@ void brw_CMP(struct brw_compile *p,
/** Extended math function, float[8].
*/
void gen4_math(struct brw_compile *p,
void gen4_math(struct brw_codegen *p,
struct brw_reg dest,
unsigned function,
unsigned msg_reg_nr,
@ -1919,7 +1919,7 @@ void gen4_math(struct brw_compile *p,
data_type);
}
void gen6_math(struct brw_compile *p,
void gen6_math(struct brw_codegen *p,
struct brw_reg dest,
unsigned function,
struct brw_reg src0,
@ -1983,7 +1983,7 @@ void gen6_math(struct brw_compile *p,
* The offset must be aligned to oword size (16 bytes). Used for
* register spilling.
*/
void brw_oword_block_write_scratch(struct brw_compile *p,
void brw_oword_block_write_scratch(struct brw_codegen *p,
struct brw_reg mrf,
int num_regs,
unsigned offset)
@ -2096,7 +2096,7 @@ void brw_oword_block_write_scratch(struct brw_compile *p,
* spilling.
*/
void
brw_oword_block_read_scratch(struct brw_compile *p,
brw_oword_block_read_scratch(struct brw_codegen *p,
struct brw_reg dest,
struct brw_reg mrf,
int num_regs,
@ -2172,7 +2172,7 @@ brw_oword_block_read_scratch(struct brw_compile *p,
}
void
gen7_block_read_scratch(struct brw_compile *p,
gen7_block_read_scratch(struct brw_codegen *p,
struct brw_reg dest,
int num_regs,
unsigned offset)
@ -2212,7 +2212,7 @@ gen7_block_read_scratch(struct brw_compile *p,
* Location (in buffer) should be a multiple of 16.
* Used for fetching shader constants.
*/
void brw_oword_block_read(struct brw_compile *p,
void brw_oword_block_read(struct brw_codegen *p,
struct brw_reg dest,
struct brw_reg mrf,
uint32_t offset,
@ -2268,7 +2268,7 @@ void brw_oword_block_read(struct brw_compile *p,
}
void brw_fb_WRITE(struct brw_compile *p,
void brw_fb_WRITE(struct brw_codegen *p,
int dispatch_width,
struct brw_reg payload,
struct brw_reg implied_header,
@ -2331,7 +2331,7 @@ void brw_fb_WRITE(struct brw_compile *p,
* Note: the msg_type plus msg_length values determine exactly what kind
* of sampling operation is performed. See volume 4, page 161 of docs.
*/
void brw_SAMPLE(struct brw_compile *p,
void brw_SAMPLE(struct brw_codegen *p,
struct brw_reg dest,
unsigned msg_reg_nr,
struct brw_reg src0,
@ -2387,7 +2387,7 @@ void brw_SAMPLE(struct brw_compile *p,
/* Adjust the message header's sampler state pointer to
* select the correct group of 16 samplers.
*/
void brw_adjust_sampler_state_pointer(struct brw_compile *p,
void brw_adjust_sampler_state_pointer(struct brw_codegen *p,
struct brw_reg header,
struct brw_reg sampler_index)
{
@ -2434,7 +2434,7 @@ void brw_adjust_sampler_state_pointer(struct brw_compile *p,
* using bitmasks and macros for this, in the old style. Or perhaps
* just having the caller instantiate the fields in dword3 itself.
*/
void brw_urb_WRITE(struct brw_compile *p,
void brw_urb_WRITE(struct brw_codegen *p,
struct brw_reg dest,
unsigned msg_reg_nr,
struct brw_reg src0,
@ -2482,7 +2482,7 @@ void brw_urb_WRITE(struct brw_compile *p,
}
struct brw_inst *
brw_send_indirect_message(struct brw_compile *p,
brw_send_indirect_message(struct brw_codegen *p,
unsigned sfid,
struct brw_reg dst,
struct brw_reg payload,
@ -2525,7 +2525,7 @@ brw_send_indirect_message(struct brw_compile *p,
}
static int
brw_find_next_block_end(struct brw_compile *p, int start_offset)
brw_find_next_block_end(struct brw_codegen *p, int start_offset)
{
int offset;
void *store = p->store;
@ -2553,7 +2553,7 @@ brw_find_next_block_end(struct brw_compile *p, int start_offset)
* instruction.
*/
static int
brw_find_loop_end(struct brw_compile *p, int start_offset)
brw_find_loop_end(struct brw_codegen *p, int start_offset)
{
const struct brw_device_info *devinfo = p->devinfo;
int offset;
@ -2585,7 +2585,7 @@ brw_find_loop_end(struct brw_compile *p, int start_offset)
* BREAK, CONT, and HALT instructions to their correct locations.
*/
void
brw_set_uip_jip(struct brw_compile *p)
brw_set_uip_jip(struct brw_codegen *p)
{
const struct brw_device_info *devinfo = p->devinfo;
int offset;
@ -2662,7 +2662,7 @@ brw_set_uip_jip(struct brw_compile *p)
}
}
void brw_ff_sync(struct brw_compile *p,
void brw_ff_sync(struct brw_codegen *p,
struct brw_reg dest,
unsigned msg_reg_nr,
struct brw_reg src0,
@ -2702,7 +2702,7 @@ void brw_ff_sync(struct brw_compile *p,
* writes are complete by sending the final write as a committed write."
*/
void
brw_svb_write(struct brw_compile *p,
brw_svb_write(struct brw_codegen *p,
struct brw_reg dest,
unsigned msg_reg_nr,
struct brw_reg src0,
@ -2730,7 +2730,7 @@ brw_svb_write(struct brw_compile *p,
}
static unsigned
brw_surface_payload_size(struct brw_compile *p,
brw_surface_payload_size(struct brw_codegen *p,
unsigned num_channels,
bool has_simd4x2,
bool has_simd16)
@ -2744,7 +2744,7 @@ brw_surface_payload_size(struct brw_compile *p,
}
static void
brw_set_dp_untyped_atomic_message(struct brw_compile *p,
brw_set_dp_untyped_atomic_message(struct brw_codegen *p,
brw_inst *insn,
unsigned atomic_op,
unsigned bind_table_index,
@ -2790,7 +2790,7 @@ brw_set_dp_untyped_atomic_message(struct brw_compile *p,
}
void
brw_untyped_atomic(struct brw_compile *p,
brw_untyped_atomic(struct brw_codegen *p,
struct brw_reg dest,
struct brw_reg payload,
unsigned atomic_op,
@ -2821,7 +2821,7 @@ brw_untyped_atomic(struct brw_compile *p,
}
static void
brw_set_dp_untyped_surface_read_message(struct brw_compile *p,
brw_set_dp_untyped_surface_read_message(struct brw_codegen *p,
brw_inst *insn,
unsigned bind_table_index,
unsigned msg_length,
@ -2864,7 +2864,7 @@ brw_set_dp_untyped_surface_read_message(struct brw_compile *p,
}
void
brw_untyped_surface_read(struct brw_compile *p,
brw_untyped_surface_read(struct brw_codegen *p,
struct brw_reg dest,
struct brw_reg mrf,
unsigned bind_table_index,
@ -2883,7 +2883,7 @@ brw_untyped_surface_read(struct brw_compile *p,
}
void
brw_pixel_interpolator_query(struct brw_compile *p,
brw_pixel_interpolator_query(struct brw_codegen *p,
struct brw_reg dest,
struct brw_reg mrf,
bool noperspective,
@ -2926,7 +2926,7 @@ brw_pixel_interpolator_query(struct brw_compile *p,
* format, and is only accessible through the legacy DATA_CACHE dataport
* messages.
*/
void brw_shader_time_add(struct brw_compile *p,
void brw_shader_time_add(struct brw_codegen *p,
struct brw_reg payload,
uint32_t surf_index)
{

10
src/mesa/drivers/dri/i965/brw_eu_util.c
View file

@ -35,7 +35,7 @@
#include "brw_eu.h"
void brw_math_invert( struct brw_compile *p,
void brw_math_invert( struct brw_codegen *p,
struct brw_reg dst,
struct brw_reg src)
{
@ -49,7 +49,7 @@ void brw_math_invert( struct brw_compile *p,
void brw_copy4(struct brw_compile *p,
void brw_copy4(struct brw_codegen *p,
struct brw_reg dst,
struct brw_reg src,
unsigned count)
@ -68,7 +68,7 @@ void brw_copy4(struct brw_compile *p,
}
void brw_copy8(struct brw_compile *p,
void brw_copy8(struct brw_codegen *p,
struct brw_reg dst,
struct brw_reg src,
unsigned count)
@ -86,7 +86,7 @@ void brw_copy8(struct brw_compile *p,
}
void brw_copy_indirect_to_indirect(struct brw_compile *p,
void brw_copy_indirect_to_indirect(struct brw_codegen *p,
struct brw_indirect dst_ptr,
struct brw_indirect src_ptr,
unsigned count)
@ -102,7 +102,7 @@ void brw_copy_indirect_to_indirect(struct brw_compile *p,
}
void brw_copy_from_indirect(struct brw_compile *p,
void brw_copy_from_indirect(struct brw_codegen *p,
struct brw_reg dst,
struct brw_indirect ptr,
unsigned count)

6
src/mesa/drivers/dri/i965/brw_ff_gs.c
View file

@ -46,7 +46,7 @@
#include "util/ralloc.h"
void
brw_compile_ff_gs_prog(struct brw_context *brw,
brw_codegen_ff_gs_prog(struct brw_context *brw,
struct brw_ff_gs_prog_key *key)
{
struct brw_ff_gs_compile c;
@ -64,7 +64,7 @@ brw_compile_ff_gs_prog(struct brw_context *brw,
/* Begin the compilation:
*/
brw_init_compile(brw->intelScreen->devinfo, &c.func, mem_ctx);
brw_init_codegen(brw->intelScreen->devinfo, &c.func, mem_ctx);
c.func.single_program_flow = 1;
@ -255,7 +255,7 @@ brw_upload_ff_gs_prog(struct brw_context *brw)
if (!brw_search_cache(&brw->cache, BRW_CACHE_FF_GS_PROG,
&key, sizeof(key),
&brw->ff_gs.prog_offset, &brw->ff_gs.prog_data)) {
brw_compile_ff_gs_prog(brw, &key);
brw_codegen_ff_gs_prog(brw, &key);
}
}
}

4
src/mesa/drivers/dri/i965/brw_ff_gs.h
View file

@ -71,7 +71,7 @@ struct brw_ff_gs_prog_key {
};
struct brw_ff_gs_compile {
struct brw_compile func;
struct brw_codegen func;
struct brw_ff_gs_prog_key key;
struct brw_ff_gs_prog_data prog_data;
@ -116,7 +116,7 @@ void
brw_upload_ff_gs_prog(struct brw_context *brw);
void
brw_compile_ff_gs_prog(struct brw_context *brw,
brw_codegen_ff_gs_prog(struct brw_context *brw,
struct brw_ff_gs_prog_key *key);
#endif

14
src/mesa/drivers/dri/i965/brw_ff_gs_emit.c
View file

@ -102,7 +102,7 @@ static void brw_ff_gs_alloc_regs(struct brw_ff_gs_compile *c,
*/
static void brw_ff_gs_initialize_header(struct brw_ff_gs_compile *c)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
brw_MOV(p, c->reg.header, c->reg.R0);
}
@ -116,7 +116,7 @@ static void brw_ff_gs_initialize_header(struct brw_ff_gs_compile *c)
static void brw_ff_gs_overwrite_header_dw2(struct brw_ff_gs_compile *c,
unsigned dw2)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
brw_MOV(p, get_element_ud(c->reg.header, 2), brw_imm_ud(dw2));
}
@ -130,7 +130,7 @@ static void brw_ff_gs_overwrite_header_dw2(struct brw_ff_gs_compile *c,
*/
static void brw_ff_gs_overwrite_header_dw2_from_r0(struct brw_ff_gs_compile *c)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
brw_AND(p, get_element_ud(c->reg.header, 2), get_element_ud(c->reg.R0, 2),
brw_imm_ud(0x1f));
brw_SHL(p, get_element_ud(c->reg.header, 2),
@ -146,7 +146,7 @@ static void brw_ff_gs_overwrite_header_dw2_from_r0(struct brw_ff_gs_compile *c)
static void brw_ff_gs_offset_header_dw2(struct brw_ff_gs_compile *c,
int offset)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
brw_ADD(p, get_element_d(c->reg.header, 2), get_element_d(c->reg.header, 2),
brw_imm_d(offset));
}
@ -168,7 +168,7 @@ static void brw_ff_gs_emit_vue(struct brw_ff_gs_compile *c,
struct brw_reg vert,
bool last)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
int write_offset = 0;
bool complete = false;
@ -226,7 +226,7 @@ static void brw_ff_gs_emit_vue(struct brw_ff_gs_compile *c,
*/
static void brw_ff_gs_ff_sync(struct brw_ff_gs_compile *c, int num_prim)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
brw_MOV(p, get_element_ud(c->reg.header, 1), brw_imm_ud(num_prim));
brw_ff_sync(p,
@ -339,7 +339,7 @@ void
gen6_sol_program(struct brw_ff_gs_compile *c, struct brw_ff_gs_prog_key *key,
unsigned num_verts, bool check_edge_flags)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
brw_inst *inst;
c->prog_data.svbi_postincrement_value = num_verts;

2
src/mesa/drivers/dri/i965/brw_fs.cpp
View file

@ -4228,7 +4228,7 @@ brw_fs_precompile(struct gl_context *ctx,
uint32_t old_prog_offset = brw->wm.base.prog_offset;
struct brw_wm_prog_data *old_prog_data = brw->wm.prog_data;
bool success = brw_compile_wm_prog(brw, shader_prog, bfp, &key);
bool success = brw_codegen_wm_prog(brw, shader_prog, bfp, &key);
brw->wm.base.prog_offset = old_prog_offset;
brw->wm.prog_data = old_prog_data;

2
src/mesa/drivers/dri/i965/brw_fs.h
View file

@ -641,7 +641,7 @@ private:
struct brw_context *brw;
const struct brw_device_info *devinfo;
struct brw_compile *p;
struct brw_codegen *p;
const void * const key;
struct brw_stage_prog_data * const prog_data;

4
src/mesa/drivers/dri/i965/brw_fs_generator.cpp
View file

@ -136,8 +136,8 @@ fs_generator::fs_generator(struct brw_context *brw,
runtime_check_aads_emit(runtime_check_aads_emit), debug_flag(false),
stage_abbrev(stage_abbrev), mem_ctx(mem_ctx)
{
p = rzalloc(mem_ctx, struct brw_compile);
brw_init_compile(devinfo, p, mem_ctx);
p = rzalloc(mem_ctx, struct brw_codegen);
brw_init_codegen(devinfo, p, mem_ctx);
}
fs_generator::~fs_generator()

6
src/mesa/drivers/dri/i965/brw_gs.c
View file

@ -35,7 +35,7 @@
bool
brw_compile_gs_prog(struct brw_context *brw,
brw_codegen_gs_prog(struct brw_context *brw,
struct gl_shader_program *prog,
struct brw_geometry_program *gp,
struct brw_gs_prog_key *key)
@ -365,7 +365,7 @@ brw_upload_gs_prog(struct brw_context *brw)
if (!brw_search_cache(&brw->cache, BRW_CACHE_GS_PROG,
&key, sizeof(key),
&stage_state->prog_offset, &brw->gs.prog_data)) {
bool success = brw_compile_gs_prog(brw, current[MESA_SHADER_GEOMETRY],
bool success = brw_codegen_gs_prog(brw, current[MESA_SHADER_GEOMETRY],
gp, &key);
assert(success);
(void)success;
@ -402,7 +402,7 @@ brw_gs_precompile(struct gl_context *ctx,
*/
key.input_varyings = gp->Base.InputsRead;
success = brw_compile_gs_prog(brw, shader_prog, bgp, &key);
success = brw_codegen_gs_prog(brw, shader_prog, bgp, &key);
brw->gs.base.prog_offset = old_prog_offset;
brw->gs.prog_data = old_prog_data;

2
src/mesa/drivers/dri/i965/brw_gs.h
View file

@ -43,7 +43,7 @@ void
brw_upload_gs_prog(struct brw_context *brw);
bool
brw_compile_gs_prog(struct brw_context *brw,
brw_codegen_gs_prog(struct brw_context *brw,
struct gl_shader_program *prog,
struct brw_geometry_program *gp,
struct brw_gs_prog_key *key);

2
src/mesa/drivers/dri/i965/brw_sf.c
View file

@ -60,7 +60,7 @@ static void compile_sf_prog( struct brw_context *brw,
mem_ctx = ralloc_context(NULL);
/* Begin the compilation:
*/
brw_init_compile(brw->intelScreen->devinfo, &c.func, mem_ctx);
brw_init_codegen(brw->intelScreen->devinfo, &c.func, mem_ctx);
c.key = *key;
c.vue_map = brw->vue_map_geom_out;

2
src/mesa/drivers/dri/i965/brw_sf.h
View file

@ -58,7 +58,7 @@ struct brw_sf_prog_key {
};
struct brw_sf_compile {
struct brw_compile func;
struct brw_codegen func;
struct brw_sf_prog_key key;
struct brw_sf_prog_data prog_data;

24
src/mesa/drivers/dri/i965/brw_sf_emit.c
View file

@ -101,7 +101,7 @@ have_attr(struct brw_sf_compile *c, GLuint attr)
static void copy_bfc( struct brw_sf_compile *c,
struct brw_reg vert )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
GLuint i;
for (i = 0; i < 2; i++) {
@ -116,7 +116,7 @@ static void copy_bfc( struct brw_sf_compile *c,
static void do_twoside_color( struct brw_sf_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
GLuint backface_conditional = c->key.frontface_ccw ? BRW_CONDITIONAL_G : BRW_CONDITIONAL_L;
/* Already done in clip program:
@ -159,7 +159,7 @@ static void copy_flatshaded_attributes(struct brw_sf_compile *c,
struct brw_reg dst,
struct brw_reg src)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
int i;
for (i = 0; i < c->vue_map.num_slots; i++) {
@ -191,7 +191,7 @@ static int count_flatshaded_attributes(struct brw_sf_compile *c)
*/
static void do_flatshade_triangle( struct brw_sf_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
GLuint nr;
GLuint jmpi = 1;
@ -223,7 +223,7 @@ static void do_flatshade_triangle( struct brw_sf_compile *c )
static void do_flatshade_line( struct brw_sf_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
GLuint nr;
GLuint jmpi = 1;
@ -305,7 +305,7 @@ static void alloc_regs( struct brw_sf_compile *c )
static void copy_z_inv_w( struct brw_sf_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
GLuint i;
/* Copy both scalars with a single MOV:
@ -397,7 +397,7 @@ calculate_point_sprite_mask(struct brw_sf_compile *c, GLuint reg)
}
static void
set_predicate_control_flag_value(struct brw_compile *p,
set_predicate_control_flag_value(struct brw_codegen *p,
struct brw_sf_compile *c,
unsigned value)
{
@ -415,7 +415,7 @@ set_predicate_control_flag_value(struct brw_compile *p,
void brw_emit_tri_setup(struct brw_sf_compile *c, bool allocate)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
GLuint i;
c->flag_value = 0xff;
@ -504,7 +504,7 @@ void brw_emit_tri_setup(struct brw_sf_compile *c, bool allocate)
void brw_emit_line_setup(struct brw_sf_compile *c, bool allocate)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
GLuint i;
c->flag_value = 0xff;
@ -576,7 +576,7 @@ void brw_emit_line_setup(struct brw_sf_compile *c, bool allocate)
void brw_emit_point_sprite_setup(struct brw_sf_compile *c, bool allocate)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
GLuint i;
c->flag_value = 0xff;
@ -668,7 +668,7 @@ void brw_emit_point_sprite_setup(struct brw_sf_compile *c, bool allocate)
*/
void brw_emit_point_setup(struct brw_sf_compile *c, bool allocate)
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
GLuint i;
c->flag_value = 0xff;
@ -727,7 +727,7 @@ void brw_emit_point_setup(struct brw_sf_compile *c, bool allocate)
void brw_emit_anyprim_setup( struct brw_sf_compile *c )
{
struct brw_compile *p = &c->func;
struct brw_codegen *p = &c->func;
struct brw_reg payload_prim = brw_uw1_reg(BRW_GENERAL_REGISTER_FILE, 1, 0);
struct brw_reg payload_attr = get_element_ud(brw_vec1_reg(BRW_GENERAL_REGISTER_FILE, 1, 0), 0);
struct brw_reg primmask;

2
src/mesa/drivers/dri/i965/brw_vec4.h
View file

@ -516,7 +516,7 @@ private:
struct brw_context *brw;
const struct brw_device_info *devinfo;
struct brw_compile *p;
struct brw_codegen *p;
struct gl_shader_program *shader_prog;
const struct gl_program *prog;

4
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
View file

@ -147,8 +147,8 @@ vec4_generator::vec4_generator(struct brw_context *brw,
mem_ctx(mem_ctx), stage_name(stage_name), stage_abbrev(stage_abbrev),
debug_flag(debug_flag)
{
p = rzalloc(mem_ctx, struct brw_compile);
brw_init_compile(brw->intelScreen->devinfo, p, mem_ctx);
p = rzalloc(mem_ctx, struct brw_codegen);
brw_init_codegen(brw->intelScreen->devinfo, p, mem_ctx);
}
vec4_generator::~vec4_generator()

6
src/mesa/drivers/dri/i965/brw_vs.c
View file

@ -189,7 +189,7 @@ brw_vs_prog_data_compare(const void *in_a, const void *in_b)
}
bool
brw_compile_vs_prog(struct brw_context *brw,
brw_codegen_vs_prog(struct brw_context *brw,
struct gl_shader_program *prog,
struct brw_vertex_program *vp,
struct brw_vs_prog_key *key)
@ -484,7 +484,7 @@ brw_upload_vs_prog(struct brw_context *brw)
if (!brw_search_cache(&brw->cache, BRW_CACHE_VS_PROG,
&key, sizeof(key),
&brw->vs.base.prog_offset, &brw->vs.prog_data)) {
bool success = brw_compile_vs_prog(brw, current[MESA_SHADER_VERTEX],
bool success = brw_codegen_vs_prog(brw, current[MESA_SHADER_VERTEX],
vp, &key);
(void) success;
assert(success);
@ -526,7 +526,7 @@ brw_vs_precompile(struct gl_context *ctx,
(prog->OutputsWritten & (VARYING_BIT_COL0 | VARYING_BIT_COL1 |
VARYING_BIT_BFC0 | VARYING_BIT_BFC1));
success = brw_compile_vs_prog(brw, shader_prog, bvp, &key);
success = brw_codegen_vs_prog(brw, shader_prog, bvp, &key);
brw->vs.base.prog_offset = old_prog_offset;
brw->vs.prog_data = old_prog_data;

2
src/mesa/drivers/dri/i965/brw_vs.h
View file

@ -76,7 +76,7 @@ void
brw_upload_vs_prog(struct brw_context *brw);
bool
brw_compile_vs_prog(struct brw_context *brw,
brw_codegen_vs_prog(struct brw_context *brw,
struct gl_shader_program *prog,
struct brw_vertex_program *vp,
struct brw_vs_prog_key *key);

4
src/mesa/drivers/dri/i965/brw_wm.c
View file

@ -160,7 +160,7 @@ brw_wm_prog_data_compare(const void *in_a, const void *in_b)
* we'll use one of two code generators.
*/
bool
brw_compile_wm_prog(struct brw_context *brw,
brw_codegen_wm_prog(struct brw_context *brw,
struct gl_shader_program *prog,
struct brw_fragment_program *fp,
struct brw_wm_prog_key *key)
@ -621,7 +621,7 @@ brw_upload_wm_prog(struct brw_context *brw)
if (!brw_search_cache(&brw->cache, BRW_CACHE_FS_PROG,
&key, sizeof(key),
&brw->wm.base.prog_offset, &brw->wm.prog_data)) {
bool success = brw_compile_wm_prog(brw, current, fp, &key);
bool success = brw_codegen_wm_prog(brw, current, fp, &key);
(void) success;
assert(success);
}

2
src/mesa/drivers/dri/i965/brw_wm.h
View file

@ -78,7 +78,7 @@ GLboolean brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog
struct gl_shader *brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type);
bool brw_color_buffer_write_enabled(struct brw_context *brw);
bool brw_compile_wm_prog(struct brw_context *brw,
bool brw_codegen_wm_prog(struct brw_context *brw,
struct gl_shader_program *prog,
struct brw_fragment_program *fp,
struct brw_wm_prog_key *key);

28
src/mesa/drivers/dri/i965/test_eu_compact.c
View file

@ -29,7 +29,7 @@
#include "brw_eu.h"
static bool
test_compact_instruction(struct brw_compile *p, brw_inst src)
test_compact_instruction(struct brw_codegen *p, brw_inst src)
{
brw_compact_inst dst;
memset(&dst, 0xd0, sizeof(dst));
@ -111,7 +111,7 @@ skip_bit(const struct brw_device_info *devinfo, brw_inst *src, int bit)
}
static bool
test_fuzz_compact_instruction(struct brw_compile *p, brw_inst src)
test_fuzz_compact_instruction(struct brw_codegen *p, brw_inst src)
{
for (int bit0 = 0; bit0 < 128; bit0++) {
if (skip_bit(p->devinfo, &src, bit0))
@ -140,7 +140,7 @@ test_fuzz_compact_instruction(struct brw_compile *p, brw_inst src)
}
static void
gen_ADD_GRF_GRF_GRF(struct brw_compile *p)
gen_ADD_GRF_GRF_GRF(struct brw_codegen *p)
{
struct brw_reg g0 = brw_vec8_grf(0, 0);
struct brw_reg g2 = brw_vec8_grf(2, 0);
@ -150,7 +150,7 @@ gen_ADD_GRF_GRF_GRF(struct brw_compile *p)
}
static void
gen_ADD_GRF_GRF_IMM(struct brw_compile *p)
gen_ADD_GRF_GRF_IMM(struct brw_codegen *p)
{
struct brw_reg g0 = brw_vec8_grf(0, 0);
struct brw_reg g2 = brw_vec8_grf(2, 0);
@ -159,7 +159,7 @@ gen_ADD_GRF_GRF_IMM(struct brw_compile *p)
}
static void
gen_ADD_GRF_GRF_IMM_d(struct brw_compile *p)
gen_ADD_GRF_GRF_IMM_d(struct brw_codegen *p)
{
struct brw_reg g0 = retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_D);
struct brw_reg g2 = retype(brw_vec8_grf(2, 0), BRW_REGISTER_TYPE_D);
@ -168,7 +168,7 @@ gen_ADD_GRF_GRF_IMM_d(struct brw_compile *p)
}
static void
gen_MOV_GRF_GRF(struct brw_compile *p)
gen_MOV_GRF_GRF(struct brw_codegen *p)
{
struct brw_reg g0 = brw_vec8_grf(0, 0);
struct brw_reg g2 = brw_vec8_grf(2, 0);
@ -177,7 +177,7 @@ gen_MOV_GRF_GRF(struct brw_compile *p)
}
static void
gen_ADD_MRF_GRF_GRF(struct brw_compile *p)
gen_ADD_MRF_GRF_GRF(struct brw_codegen *p)
{
struct brw_reg m6 = brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, 6, 0);
struct brw_reg g2 = brw_vec8_grf(2, 0);
@ -187,7 +187,7 @@ gen_ADD_MRF_GRF_GRF(struct brw_compile *p)
}
static void
gen_ADD_vec1_GRF_GRF_GRF(struct brw_compile *p)
gen_ADD_vec1_GRF_GRF_GRF(struct brw_codegen *p)
{
struct brw_reg g0 = brw_vec1_grf(0, 0);
struct brw_reg g2 = brw_vec1_grf(2, 0);
@ -197,7 +197,7 @@ gen_ADD_vec1_GRF_GRF_GRF(struct brw_compile *p)
}
static void
gen_PLN_MRF_GRF_GRF(struct brw_compile *p)
gen_PLN_MRF_GRF_GRF(struct brw_codegen *p)
{
struct brw_reg m6 = brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, 6, 0);
struct brw_reg interp = brw_vec1_grf(2, 0);
@ -207,7 +207,7 @@ gen_PLN_MRF_GRF_GRF(struct brw_compile *p)
}
static void
gen_f0_0_MOV_GRF_GRF(struct brw_compile *p)
gen_f0_0_MOV_GRF_GRF(struct brw_codegen *p)
{
struct brw_reg g0 = brw_vec8_grf(0, 0);
struct brw_reg g2 = brw_vec8_grf(2, 0);
@ -223,7 +223,7 @@ gen_f0_0_MOV_GRF_GRF(struct brw_compile *p)
* interact with it.
*/
static void
gen_f0_1_MOV_GRF_GRF(struct brw_compile *p)
gen_f0_1_MOV_GRF_GRF(struct brw_codegen *p)
{
struct brw_reg g0 = brw_vec8_grf(0, 0);
struct brw_reg g2 = brw_vec8_grf(2, 0);
@ -236,7 +236,7 @@ gen_f0_1_MOV_GRF_GRF(struct brw_compile *p)
}
struct {
void (*func)(struct brw_compile *p);
void (*func)(struct brw_codegen *p);
} tests[] = {
{ gen_MOV_GRF_GRF },
{ gen_ADD_GRF_GRF_GRF },
@ -256,8 +256,8 @@ run_tests(const struct brw_device_info *devinfo)
for (int i = 0; i < ARRAY_SIZE(tests); i++) {
for (int align_16 = 0; align_16 <= 1; align_16++) {
struct brw_compile *p = rzalloc(NULL, struct brw_compile);
brw_init_compile(devinfo, p, p);
struct brw_codegen *p = rzalloc(NULL, struct brw_codegen);
brw_init_codegen(devinfo, p, p);
brw_set_default_predicate_control(p, BRW_PREDICATE_NONE);
if (align_16)