From a84069cff4217677bb697390eeec0d19bbd6ae98 Mon Sep 17 00:00:00 2001
From: Rob Clark <rob.clark@oss.qualcomm.com>
Date: Wed, 20 Aug 2025 09:04:18 -0700
Subject: [PATCH] freedreno/registers: De-open-code some offsets

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
---
 src/freedreno/common/freedreno_devices.py | 5 +++--
 src/freedreno/registers/adreno/a6xx.xml   | 3 +++
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/src/freedreno/common/freedreno_devices.py b/src/freedreno/common/freedreno_devices.py
index 37e5d5eca08..2d3a8c25b0a 100644
--- a/src/freedreno/common/freedreno_devices.py
+++ b/src/freedreno/common/freedreno_devices.py
@@ -1350,8 +1350,9 @@ add_gpus([
             [A6XXRegs.REG_A7XX_RB_UNKNOWN_8899,   0x00000000],
             [A6XXRegs.REG_A7XX_RB_UNKNOWN_8C34,   0x00000000],
 
-            [0x930a, 0],
-            [0x960a, 1],
+            [A6XXRegs.REG_A7XX_VPC_UNKNOWN_930A, 0],
+            [A6XXRegs.REG_A7XX_PC_UNKNOWN_9EB6, 0],
+
             [A6XXRegs.REG_A7XX_SP_PS_OUTPUT_CONST_CNTL, 0],
             [A6XXRegs.REG_A7XX_SP_PS_OUTPUT_CONST_MASK, 0],
         ],
diff --git a/src/freedreno/registers/adreno/a6xx.xml b/src/freedreno/registers/adreno/a6xx.xml
index 196b46cda61..55a12af36f4 100644
--- a/src/freedreno/registers/adreno/a6xx.xml
+++ b/src/freedreno/registers/adreno/a6xx.xml
@@ -2186,6 +2186,9 @@ by a particular renderpass/blit.
 		<bitfield name="SIZE_GMEM" low="0" high="31"/>
 	</reg32>
 
+	<reg32 offset="0x930a" name="VPC_UNKNOWN_930A" variants="A7XX"/>
+	<reg32 offset="0x9eb6" name="PC_UNKNOWN_9EB6" variants="A7XX"/>
+
 	<!-- 0x9307-0x95ff invalid -->
 
 	<!-- TODO: 0x9600-0x97ff range -->