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vc4: Clean up the tile alloc buffer size.

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This prevents some simulator assertion failures, but it does mean (since
I've dropped the "* 16" padding) that on real hardware you need a kernel
that does overflow memory management (currently, "drm/vc4: Add support for
binner overflow memory allocation." in my kernel tree).
This commit is contained in:
Eric Anholt 2014-08-05 11:00:51 -07:00
parent 7050ab510d
commit a7faca5d27
1 changed files with 9 additions and 1 deletions
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10
src/gallium/drivers/vc4/vc4_draw.c
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@ -45,7 +45,15 @@ vc4_start_draw(struct vc4_context *vc4)
uint32_t tilew = align(width, 64) / 64;
uint32_t tileh = align(height, 64) / 64;
uint32_t tile_alloc_size = 32 * tilew * tileh * 16;
/* Tile alloc memory setup: We use an initial alloc size of 32b. The
* hardware then aligns that to 256b (we use 4096, because all of our
* BO allocations align to that anyway), then for some reason the
* simulator wants an extra page available, even if you have overflow
* memory set up.
*/
uint32_t tile_alloc_size = 32 * tilew * tileh;
tile_alloc_size = align(tile_alloc_size, 4096);
tile_alloc_size += 4096;
uint32_t tile_state_size = 48 * tilew * tileh;
if (!vc4->tile_alloc || vc4->tile_alloc->size < tile_alloc_size) {
vc4_bo_unreference(&vc4->tile_alloc);