diff --git a/src/gallium/drivers/radeonsi/si_build_pm4.h b/src/gallium/drivers/radeonsi/si_build_pm4.h
index 4389584f27b..6abb9f228f0 100644
--- a/src/gallium/drivers/radeonsi/si_build_pm4.h
+++ b/src/gallium/drivers/radeonsi/si_build_pm4.h
@@ -498,18 +498,15 @@
 #define radeon_event_write(event_type) \
    ac_cmdbuf_event_write(event_type)
 
-#define radeon_emit_alt_hiz_logic() do { \
-   static_assert(GFX_VERSION == GFX12 || !ALT_HIZ_LOGIC, ""); \
-   if (GFX_VERSION == GFX12 && ALT_HIZ_LOGIC) { \
-      radeon_emit(PKT3(PKT3_RELEASE_MEM, 6, 0)); \
-      radeon_emit(S_490_EVENT_TYPE(V_028A90_BOTTOM_OF_PIPE_TS) | S_490_EVENT_INDEX(5)); \
-      radeon_emit(0); /* DST_SEL, INT_SEL = no write confirm, DATA_SEL = no data */ \
-      radeon_emit(0); /* ADDRESS_LO */ \
-      radeon_emit(0); /* ADDRESS_HI */ \
-      radeon_emit(0); /* DATA_LO */ \
-      radeon_emit(0); /* DATA_HI */ \
-      radeon_emit(0); /* INT_CTXID */ \
-   } \
+#define radeon_emit_alt_hiz_packets() do { \
+   radeon_emit(PKT3(PKT3_RELEASE_MEM, 6, 0)); \
+   radeon_emit(S_490_EVENT_TYPE(V_028A90_BOTTOM_OF_PIPE_TS) | S_490_EVENT_INDEX(5)); \
+   radeon_emit(0); /* DST_SEL, INT_SEL = no write confirm, DATA_SEL = no data */ \
+   radeon_emit(0); /* ADDRESS_LO */ \
+   radeon_emit(0); /* ADDRESS_HI */ \
+   radeon_emit(0); /* DATA_LO */ \
+   radeon_emit(0); /* DATA_HI */ \
+   radeon_emit(0); /* INT_CTXID */ \
 } while (0)
 
 /* This should be evaluated at compile time if all parameters are constants. */
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.cpp b/src/gallium/drivers/radeonsi/si_state_draw.cpp
index b30cf9519ab..93e37d442ec 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.cpp
+++ b/src/gallium/drivers/radeonsi/si_state_draw.cpp
@@ -1290,6 +1290,12 @@ void si_emit_buffered_gfx_sh_regs_for_mesh(struct si_context *sctx)
 
 #endif
 
+#define radeon_emit_alt_hiz_logic() do { \
+   static_assert(GFX_VERSION == GFX12 || !ALT_HIZ_LOGIC, ""); \
+   if (GFX_VERSION == GFX12 && ALT_HIZ_LOGIC) \
+      radeon_emit_alt_hiz_packets(); \
+} while (0)
+
 template <amd_gfx_level GFX_VERSION, si_has_tess HAS_TESS, si_has_gs HAS_GS, si_has_ngg NGG,
           si_is_draw_vertex_state IS_DRAW_VERTEX_STATE, si_has_sh_pairs_packed HAS_SH_PAIRS_PACKED,
           si_alt_hiz_logic ALT_HIZ_LOGIC> ALWAYS_INLINE