diff --git a/src/freedreno/ir3/ir3_legalize.c b/src/freedreno/ir3/ir3_legalize.c index 7a3af2d2a09..a0095e18329 100644 --- a/src/freedreno/ir3/ir3_legalize.c +++ b/src/freedreno/ir3/ir3_legalize.c @@ -52,6 +52,7 @@ struct ir3_legalize_state { regmask_t needs_ss_or_sy_scalar_war; regmask_t needs_sy; bool needs_ss_for_const; + bool needs_sy_for_const; /* Each of these arrays contains the cycle when the corresponding register * becomes "ready" i.e. does not require any more nops. There is a special @@ -125,6 +126,7 @@ apply_sy(struct ir3_instruction *instr, regmask_init(&state->needs_sy, mergedregs); regmask_init(&state->needs_ss_or_sy_war, mergedregs); regmask_init(&state->needs_ss_or_sy_scalar_war, mergedregs); + state->needs_sy_for_const = false; } static bool @@ -359,6 +361,7 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block) &pstate->needs_ss_or_sy_war); regmask_or(&state->needs_sy, &state->needs_sy, &pstate->needs_sy); state->needs_ss_for_const |= pstate->needs_ss_for_const; + state->needs_sy_for_const |= pstate->needs_sy_for_const; /* Our nop state is the max of the predecessor blocks */ for (unsigned i = 0; i < ARRAY_SIZE(state->pred_ready); i++) @@ -517,6 +520,9 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block) apply_ss(n, state, mergedregs); last_input_needs_ss = false; } + if (state->needs_sy_for_const) { + apply_sy(n, state, mergedregs); + } } else if (reg_is_addr1(reg) && block->in_early_preamble) { if (regmask_get(&state->needs_ss, reg)) { apply_ss(n, state, mergedregs); @@ -646,6 +652,8 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block) } } else if (n->opc == OPC_PUSH_CONSTS_LOAD_MACRO || n->opc == OPC_STC) { state->needs_ss_for_const = true; + } else if (n->opc == OPC_LDC_K) { + state->needs_sy_for_const = true; } if (is_ssbo(n->opc) || is_global_a3xx_atomic(n->opc) ||