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pvr: Merge main and extension command streams

Browse source 
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23872>
This commit is contained in:
Sarah Walker 2022-10-14 14:06:15 +01:00 • committed by Marge Bot
parent 8d3e8c3ad9
commit a76818e525
8 changed files with 155 additions and 88 deletions
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4
src/imagination/csbgen/rogue_fw.xml
View file

@ -33,6 +33,10 @@ needs updating.
<csbgen name="ROGUE" prefix="FW">
<struct name="STREAM_HDR" length="2">
<field name="length" start="0" end="31" type="uint"/>
</struct>
<define name="STREAM_EXTHDR_DATA_MASK" value="0xFFFFFFF"/>
<enum name="STREAM_EXTHDR_TYPE_COMPUTE">

29
src/imagination/vulkan/pvr_job_compute.c
View file

@ -49,6 +49,10 @@ pvr_submit_info_stream_init(struct pvr_compute_ctx *ctx,
const struct pvr_compute_ctx_switch *const ctx_switch = &ctx->ctx_switch;
uint32_t *stream_ptr = (uint32_t *)submit_info->fw_stream;
uint32_t *stream_len_ptr = stream_ptr;
/* Leave space for stream header. */
stream_ptr += pvr_cmd_length(FW_STREAM_HDR);
pvr_csb_pack ((uint64_t *)stream_ptr,
CR_TPU_BORDER_COLOUR_TABLE_CDM,
@ -122,8 +126,13 @@ pvr_submit_info_stream_init(struct pvr_compute_ctx *ctx,
stream_ptr++;
}
submit_info->fw_stream_len = (uint8_t *)stream_ptr - submit_info->fw_stream;
submit_info->fw_stream_len =
(uint8_t *)stream_ptr - (uint8_t *)submit_info->fw_stream;
assert(submit_info->fw_stream_len <= ARRAY_SIZE(submit_info->fw_stream));
pvr_csb_pack ((uint64_t *)stream_len_ptr, FW_STREAM_HDR, value) {
value.length = submit_info->fw_stream_len;
}
}
static void pvr_submit_info_ext_stream_init(
@ -133,7 +142,11 @@ static void pvr_submit_info_ext_stream_init(
const struct pvr_device_info *const dev_info =
&ctx->device->pdevice->dev_info;
uint32_t *ext_stream_ptr = (uint32_t *)submit_info->fw_ext_stream;
uint32_t *stream_ptr = (uint32_t *)submit_info->fw_stream;
uint32_t main_stream_len =
pvr_csb_unpack((uint64_t *)stream_ptr, FW_STREAM_HDR).length;
uint32_t *ext_stream_ptr =
(uint32_t *)((uint8_t *)stream_ptr + main_stream_len);
uint32_t *header0_ptr;
header0_ptr = ext_stream_ptr;
@ -150,13 +163,11 @@ static void pvr_submit_info_ext_stream_init(
}
}
submit_info->fw_ext_stream_len =
(uint8_t *)ext_stream_ptr - submit_info->fw_ext_stream;
assert(submit_info->fw_ext_stream_len <=
ARRAY_SIZE(submit_info->fw_ext_stream));
if ((*header0_ptr & PVRX(FW_STREAM_EXTHDR_DATA_MASK)) == 0)
submit_info->fw_ext_stream_len = 0;
if ((*header0_ptr & PVRX(FW_STREAM_EXTHDR_DATA_MASK)) != 0) {
submit_info->fw_stream_len =
(uint8_t *)ext_stream_ptr - (uint8_t *)submit_info->fw_stream;
assert(submit_info->fw_stream_len <= ARRAY_SIZE(submit_info->fw_stream));
}
}
static void

50
src/imagination/vulkan/pvr_job_render.c
View file

@ -942,6 +942,10 @@ static void pvr_geom_state_stream_init(struct pvr_render_ctx *ctx,
const struct pvr_device_info *const dev_info = &device->pdevice->dev_info;
uint32_t *stream_ptr = (uint32_t *)state->fw_stream;
uint32_t *stream_len_ptr = stream_ptr;
/* Leave space for stream header. */
stream_ptr += pvr_cmd_length(FW_STREAM_HDR);
pvr_csb_pack ((uint64_t *)stream_ptr, CR_VDM_CTRL_STREAM_BASE, value) {
value.addr = job->ctrl_stream_addr;
@ -990,8 +994,12 @@ static void pvr_geom_state_stream_init(struct pvr_render_ctx *ctx,
*stream_ptr = 0;
stream_ptr++;
state->fw_stream_len = (uint8_t *)stream_ptr - state->fw_stream;
state->fw_stream_len = (uint8_t *)stream_ptr - (uint8_t *)state->fw_stream;
assert(state->fw_stream_len <= ARRAY_SIZE(state->fw_stream));
pvr_csb_pack ((uint64_t *)stream_len_ptr, FW_STREAM_HDR, value) {
value.length = state->fw_stream_len;
}
}
static void
@ -1001,7 +1009,10 @@ pvr_geom_state_stream_ext_init(struct pvr_render_ctx *ctx,
{
const struct pvr_device_info *dev_info = &ctx->device->pdevice->dev_info;
uint32_t *ext_stream_ptr = (uint32_t *)state->fw_ext_stream;
uint32_t main_stream_len =
pvr_csb_unpack((uint64_t *)state->fw_stream, FW_STREAM_HDR).length;
uint32_t *ext_stream_ptr =
(uint32_t *)((uint8_t *)state->fw_stream + main_stream_len);
uint32_t *header0_ptr;
header0_ptr = ext_stream_ptr;
@ -1021,11 +1032,11 @@ pvr_geom_state_stream_ext_init(struct pvr_render_ctx *ctx,
}
}
state->fw_ext_stream_len = (uint8_t *)ext_stream_ptr - state->fw_ext_stream;
assert(state->fw_ext_stream_len <= ARRAY_SIZE(state->fw_ext_stream));
if ((*header0_ptr & PVRX(FW_STREAM_EXTHDR_DATA_MASK)) == 0)
state->fw_ext_stream_len = 0;
if ((*header0_ptr & PVRX(FW_STREAM_EXTHDR_DATA_MASK)) != 0) {
state->fw_stream_len =
(uint8_t *)ext_stream_ptr - (uint8_t *)state->fw_stream;
assert(state->fw_stream_len <= ARRAY_SIZE(state->fw_stream));
}
}
static void
@ -1066,9 +1077,13 @@ static void pvr_frag_state_stream_init(struct pvr_render_ctx *ctx,
enum PVRX(CR_ZLS_FORMAT_TYPE) zload_format = PVRX(CR_ZLS_FORMAT_TYPE_F32Z);
uint32_t *stream_ptr = (uint32_t *)state->fw_stream;
uint32_t *stream_len_ptr = stream_ptr;
uint32_t pixel_ctl;
uint32_t isp_ctl;
/* Leave space for stream header. */
stream_ptr += pvr_cmd_length(FW_STREAM_HDR);
/* FIXME: pass in the number of samples rather than isp_aa_mode? */
pvr_setup_tiles_in_flight(dev_info,
dev_runtime_info,
@ -1350,8 +1365,12 @@ static void pvr_frag_state_stream_init(struct pvr_render_ctx *ctx,
stream_ptr++;
}
state->fw_stream_len = (uint8_t *)stream_ptr - state->fw_stream;
state->fw_stream_len = (uint8_t *)stream_ptr - (uint8_t *)state->fw_stream;
assert(state->fw_stream_len <= ARRAY_SIZE(state->fw_stream));
pvr_csb_pack ((uint64_t *)stream_len_ptr, FW_STREAM_HDR, value) {
value.length = state->fw_stream_len;
}
}
static void
@ -1361,7 +1380,10 @@ pvr_frag_state_stream_ext_init(struct pvr_render_ctx *ctx,
{
const struct pvr_device_info *dev_info = &ctx->device->pdevice->dev_info;
uint32_t *ext_stream_ptr = (uint32_t *)state->fw_ext_stream;
uint32_t main_stream_len =
pvr_csb_unpack((uint64_t *)state->fw_stream, FW_STREAM_HDR).length;
uint32_t *ext_stream_ptr =
(uint32_t *)((uint8_t *)state->fw_stream + main_stream_len);
uint32_t *header0_ptr;
header0_ptr = ext_stream_ptr;
@ -1381,11 +1403,11 @@ pvr_frag_state_stream_ext_init(struct pvr_render_ctx *ctx,
}
}
state->fw_ext_stream_len = (uint8_t *)ext_stream_ptr - state->fw_ext_stream;
assert(state->fw_ext_stream_len <= ARRAY_SIZE(state->fw_ext_stream));
if ((*header0_ptr & PVRX(FW_STREAM_EXTHDR_DATA_MASK)) == 0)
state->fw_ext_stream_len = 0;
if ((*header0_ptr & PVRX(FW_STREAM_EXTHDR_DATA_MASK)) != 0) {
state->fw_stream_len =
(uint8_t *)ext_stream_ptr - (uint8_t *)state->fw_stream;
assert(state->fw_stream_len <= ARRAY_SIZE(state->fw_stream));
}
}
static void

10
src/imagination/vulkan/pvr_job_transfer.c
View file

@ -5665,6 +5665,10 @@ pvr_submit_info_stream_init(struct pvr_transfer_ctx *ctx,
const struct pvr_device_info *const dev_info = &pdevice->dev_info;
uint32_t *stream_ptr = (uint32_t *)cmd->fw_stream;
uint32_t *stream_len_ptr = stream_ptr;
/* Leave space for stream header. */
stream_ptr += pvr_cmd_length(FW_STREAM_HDR);
*(uint64_t *)stream_ptr = regs->pds_bgnd0_base;
stream_ptr += pvr_cmd_length(CR_PDS_BGRND0_BASE);
@ -5733,8 +5737,12 @@ pvr_submit_info_stream_init(struct pvr_transfer_ctx *ctx,
stream_ptr++;
}
cmd->fw_stream_len = (uint8_t *)stream_ptr - cmd->fw_stream;
cmd->fw_stream_len = (uint8_t *)stream_ptr - (uint8_t *)cmd->fw_stream;
assert(cmd->fw_stream_len <= ARRAY_SIZE(cmd->fw_stream));
pvr_csb_pack ((uint64_t *)stream_len_ptr, FW_STREAM_HDR, value) {
value.length = cmd->fw_stream_len;
}
}
static void

32
src/imagination/vulkan/winsys/pvr_winsys.h
View file

@ -270,7 +270,7 @@ struct pvr_winsys_transfer_regs {
struct pvr_winsys_transfer_cmd {
/* Firmware stream buffer. This is the maximum possible size taking into
* consideration all HW features.
* consideration all HW features, quirks and enhancements.
*/
uint8_t fw_stream[172];
uint32_t fw_stream_len;
@ -297,17 +297,11 @@ struct pvr_winsys_compute_submit_info {
struct vk_sync *wait;
/* Firmware stream buffer. This is the maximum possible size taking into
* consideration all HW features.
* consideration all HW features, quirks and enhancements.
*/
uint8_t fw_stream[92];
uint8_t fw_stream[100];
uint32_t fw_stream_len;
/* Firmware extension stream buffer. This is the maximum possible size taking
* into considation all quirks and enhancements.
*/
uint8_t fw_ext_stream[8];
uint32_t fw_ext_stream_len;
struct pvr_winsys_compute_submit_flags {
bool prevent_all_overlap : 1;
bool use_single_core : 1;
@ -326,17 +320,11 @@ struct pvr_winsys_render_submit_info {
struct pvr_winsys_geometry_state {
/* Firmware stream buffer. This is the maximum possible size taking into
* consideration all HW features.
* consideration all HW features, quirks and enhancements.
*/
uint8_t fw_stream[52];
uint8_t fw_stream[64];
uint32_t fw_stream_len;
/* Firmware extension stream buffer. This is the maximum possible size
* taking into considation all quirks and enhancements.
*/
uint8_t fw_ext_stream[12];
uint32_t fw_ext_stream_len;
struct pvr_winsys_geometry_state_flags {
bool is_first_geometry : 1;
bool is_last_geometry : 1;
@ -348,17 +336,11 @@ struct pvr_winsys_render_submit_info {
struct pvr_winsys_fragment_state {
/* Firmware stream buffer. This is the maximum possible size taking into
* consideration all HW features.
* consideration all HW features, quirks and enhancements.
*/
uint8_t fw_stream[432];
uint8_t fw_stream[440];
uint32_t fw_stream_len;
/* Firmware extension stream buffer. This is the maximum possible size
* taking into considation all quirks and enhancements.
*/
uint8_t fw_ext_stream[8];
uint32_t fw_ext_stream_len;
struct pvr_winsys_fragment_state_flags {
bool has_depth_buffer : 1;
bool has_stencil_buffer : 1;

39
src/imagination/vulkan/winsys/pvrsrvkm/pvr_srv_job_compute.c
View file

@ -138,7 +138,7 @@ void pvr_srv_winsys_compute_ctx_destroy(struct pvr_winsys_compute_ctx *ctx)
vk_free(srv_ws->base.alloc, srv_ctx);
}
static void
static uint32_t
pvr_srv_compute_cmd_stream_load(struct rogue_fwif_cmd_compute *const cmd,
const uint8_t *const stream,
const uint32_t stream_len,
@ -146,6 +146,10 @@ pvr_srv_compute_cmd_stream_load(struct rogue_fwif_cmd_compute *const cmd,
{
const uint32_t *stream_ptr = (const uint32_t *)stream;
struct rogue_fwif_cdm_regs *const regs = &cmd->regs;
uint32_t main_stream_len =
pvr_csb_unpack((uint64_t *)stream_ptr, FW_STREAM_HDR).length;
stream_ptr += pvr_cmd_length(FW_STREAM_HDR);
regs->tpu_border_colour_table = *(const uint64_t *)stream_ptr;
stream_ptr += pvr_cmd_length(CR_TPU_BORDER_COLOUR_TABLE_CDM);
@ -172,16 +176,21 @@ pvr_srv_compute_cmd_stream_load(struct rogue_fwif_cmd_compute *const cmd,
stream_ptr++;
}
assert((const uint8_t *)stream_ptr - stream == stream_len);
assert((const uint8_t *)stream_ptr - stream <= stream_len);
assert((const uint8_t *)stream_ptr - stream == main_stream_len);
return main_stream_len;
}
static void pvr_srv_compute_cmd_ext_stream_load(
struct rogue_fwif_cmd_compute *const cmd,
const uint8_t *const ext_stream,
const uint32_t ext_stream_len,
const uint8_t *const stream,
const uint32_t stream_len,
const uint32_t ext_stream_offset,
const struct pvr_device_info *const dev_info)
{
const uint32_t *ext_stream_ptr = (const uint32_t *)ext_stream;
const uint32_t *ext_stream_ptr =
(const uint32_t *)((uint8_t *)stream + ext_stream_offset);
struct rogue_fwif_cdm_regs *const regs = &cmd->regs;
struct PVRX(FW_STREAM_EXTHDR_COMPUTE0) header0;
@ -195,7 +204,7 @@ static void pvr_srv_compute_cmd_ext_stream_load(
ext_stream_ptr += pvr_cmd_length(CR_TPU);
}
assert((const uint8_t *)ext_stream_ptr - ext_stream == ext_stream_len);
assert((const uint8_t *)ext_stream_ptr - stream == stream_len);
}
static void pvr_srv_compute_cmd_init(
@ -203,19 +212,23 @@ static void pvr_srv_compute_cmd_init(
struct rogue_fwif_cmd_compute *cmd,
const struct pvr_device_info *const dev_info)
{
uint32_t ext_stream_offset;
memset(cmd, 0, sizeof(*cmd));
cmd->cmn.frame_num = submit_info->frame_num;
pvr_srv_compute_cmd_stream_load(cmd,
submit_info->fw_stream,
submit_info->fw_stream_len,
dev_info);
ext_stream_offset =
pvr_srv_compute_cmd_stream_load(cmd,
submit_info->fw_stream,
submit_info->fw_stream_len,
dev_info);
if (submit_info->fw_ext_stream_len) {
if (ext_stream_offset < submit_info->fw_stream_len) {
pvr_srv_compute_cmd_ext_stream_load(cmd,
submit_info->fw_ext_stream,
submit_info->fw_ext_stream_len,
submit_info->fw_stream,
submit_info->fw_stream_len,
ext_stream_offset,
dev_info);
}

74
src/imagination/vulkan/winsys/pvrsrvkm/pvr_srv_job_render.c
View file

@ -634,7 +634,7 @@ void pvr_srv_winsys_render_ctx_destroy(struct pvr_winsys_render_ctx *ctx)
vk_free(srv_ws->base.alloc, srv_ctx);
}
static void
static uint32_t
pvr_srv_geometry_cmd_stream_load(struct rogue_fwif_cmd_ta *const cmd,
const uint8_t *const stream,
const uint32_t stream_len,
@ -642,6 +642,10 @@ pvr_srv_geometry_cmd_stream_load(struct rogue_fwif_cmd_ta *const cmd,
{
const uint32_t *stream_ptr = (const uint32_t *)stream;
struct rogue_fwif_ta_regs *const regs = &cmd->regs;
uint32_t main_stream_len =
pvr_csb_unpack((const uint64_t *)stream_ptr, FW_STREAM_HDR).length;
stream_ptr += pvr_cmd_length(FW_STREAM_HDR);
regs->vdm_ctrl_stream_base = *(const uint64_t *)stream_ptr;
stream_ptr += pvr_cmd_length(CR_VDM_CTRL_STREAM_BASE);
@ -661,16 +665,21 @@ pvr_srv_geometry_cmd_stream_load(struct rogue_fwif_cmd_ta *const cmd,
regs->view_idx = *stream_ptr;
stream_ptr++;
assert((const uint8_t *)stream_ptr - stream == stream_len);
assert((const uint8_t *)stream_ptr - stream <= stream_len);
assert((const uint8_t *)stream_ptr - stream == main_stream_len);
return main_stream_len;
}
static void pvr_srv_geometry_cmd_ext_stream_load(
struct rogue_fwif_cmd_ta *const cmd,
const uint8_t *const ext_stream,
const uint32_t ext_stream_len,
const uint8_t *const stream,
const uint32_t stream_len,
const uint32_t ext_stream_offset,
const struct pvr_device_info *const dev_info)
{
const uint32_t *ext_stream_ptr = (const uint32_t *)ext_stream;
const uint32_t *ext_stream_ptr =
(const uint32_t *)((uint8_t *)stream + ext_stream_offset);
struct rogue_fwif_ta_regs *const regs = &cmd->regs;
struct PVRX(FW_STREAM_EXTHDR_GEOM0) header0;
@ -684,7 +693,7 @@ static void pvr_srv_geometry_cmd_ext_stream_load(
ext_stream_ptr += pvr_cmd_length(CR_TPU);
}
assert((const uint8_t *)ext_stream_ptr - ext_stream == ext_stream_len);
assert((const uint8_t *)ext_stream_ptr - stream == stream_len);
}
static void pvr_srv_geometry_cmd_init(
@ -694,20 +703,22 @@ static void pvr_srv_geometry_cmd_init(
const struct pvr_device_info *const dev_info)
{
const struct pvr_winsys_geometry_state *state = &submit_info->geometry;
uint32_t ext_stream_offset;
memset(cmd, 0, sizeof(*cmd));
cmd->cmd_shared.cmn.frame_num = submit_info->frame_num;
pvr_srv_geometry_cmd_stream_load(cmd,
state->fw_stream,
state->fw_stream_len,
dev_info);
ext_stream_offset = pvr_srv_geometry_cmd_stream_load(cmd,
state->fw_stream,
state->fw_stream_len,
dev_info);
if (state->fw_ext_stream_len) {
if (ext_stream_offset < state->fw_stream_len) {
pvr_srv_geometry_cmd_ext_stream_load(cmd,
state->fw_ext_stream,
state->fw_ext_stream_len,
state->fw_stream,
state->fw_stream_len,
ext_stream_offset,
dev_info);
}
@ -725,7 +736,7 @@ static void pvr_srv_geometry_cmd_init(
cmd->partial_render_ta_3d_fence.value = sync_prim->value;
}
static void
static uint32_t
pvr_srv_fragment_cmd_stream_load(struct rogue_fwif_cmd_3d *const cmd,
const uint8_t *const stream,
const uint32_t stream_len,
@ -733,6 +744,10 @@ pvr_srv_fragment_cmd_stream_load(struct rogue_fwif_cmd_3d *const cmd,
{
const uint32_t *stream_ptr = (const uint32_t *)stream;
struct rogue_fwif_3d_regs *const regs = &cmd->regs;
uint32_t main_stream_len =
pvr_csb_unpack((const uint64_t *)stream_ptr, FW_STREAM_HDR).length;
stream_ptr += pvr_cmd_length(FW_STREAM_HDR);
regs->isp_scissor_base = *(const uint64_t *)stream_ptr;
stream_ptr += pvr_cmd_length(CR_ISP_SCISSOR_BASE);
@ -833,16 +848,21 @@ pvr_srv_fragment_cmd_stream_load(struct rogue_fwif_cmd_3d *const cmd,
stream_ptr++;
}
assert((const uint8_t *)stream_ptr - stream == stream_len);
assert((const uint8_t *)stream_ptr - stream <= stream_len);
assert((const uint8_t *)stream_ptr - stream == main_stream_len);
return main_stream_len;
}
static void pvr_srv_fragment_cmd_ext_stream_load(
struct rogue_fwif_cmd_3d *const cmd,
const uint8_t *const ext_stream,
const uint32_t ext_stream_len,
const uint8_t *const stream,
const uint32_t stream_len,
const uint32_t ext_stream_offset,
const struct pvr_device_info *const dev_info)
{
const uint32_t *ext_stream_ptr = (const uint32_t *)ext_stream;
const uint32_t *ext_stream_ptr =
(const uint32_t *)((uint8_t *)stream + ext_stream_offset);
struct rogue_fwif_3d_regs *const regs = &cmd->regs;
struct PVRX(FW_STREAM_EXTHDR_FRAG0) header0;
@ -856,7 +876,7 @@ static void pvr_srv_fragment_cmd_ext_stream_load(
ext_stream_ptr += pvr_cmd_length(CR_TPU);
}
assert((const uint8_t *)ext_stream_ptr - ext_stream == ext_stream_len);
assert((const uint8_t *)ext_stream_ptr - stream == stream_len);
}
static void pvr_srv_fragment_cmd_init(
@ -865,20 +885,22 @@ static void pvr_srv_fragment_cmd_init(
const struct pvr_device_info *dev_info)
{
const struct pvr_winsys_fragment_state *state = &submit_info->fragment;
uint32_t ext_stream_offset;
memset(cmd, 0, sizeof(*cmd));
cmd->cmd_shared.cmn.frame_num = submit_info->frame_num;
pvr_srv_fragment_cmd_stream_load(cmd,
state->fw_stream,
state->fw_stream_len,
dev_info);
ext_stream_offset = pvr_srv_fragment_cmd_stream_load(cmd,
state->fw_stream,
state->fw_stream_len,
dev_info);
if (state->fw_ext_stream_len) {
if (ext_stream_offset < state->fw_stream_len) {
pvr_srv_fragment_cmd_ext_stream_load(cmd,
state->fw_ext_stream,
state->fw_ext_stream_len,
state->fw_stream,
state->fw_stream_len,
ext_stream_offset,
dev_info);
}

5
src/imagination/vulkan/winsys/pvrsrvkm/pvr_srv_job_transfer.c
View file

@ -140,6 +140,10 @@ pvr_srv_transfer_cmd_stream_load(struct rogue_fwif_cmd_transfer *const cmd,
{
const uint32_t *stream_ptr = (const uint32_t *)stream;
struct rogue_fwif_transfer_regs *const regs = &cmd->regs;
uint32_t main_stream_len =
pvr_csb_unpack((uint64_t *)stream_ptr, FW_STREAM_HDR).length;
stream_ptr += pvr_cmd_length(FW_STREAM_HDR);
regs->pds_bgnd0_base = *(uint64_t *)stream_ptr;
stream_ptr += pvr_cmd_length(CR_PDS_BGRND0_BASE);
@ -209,6 +213,7 @@ pvr_srv_transfer_cmd_stream_load(struct rogue_fwif_cmd_transfer *const cmd,
}
assert((const uint8_t *)stream_ptr - stream == stream_len);
assert((const uint8_t *)stream_ptr - stream == main_stream_len);
}
static void pvr_srv_transfer_cmds_init(