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intel/brw: adjust the copy propgation pass to account for wider GRF's on Xe2+

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Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27235>
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Rohan Garg 2024-02-15 20:23:18 +01:00 • committed by Marge Bot
parent 7d425913f7
commit a715512177
1 changed files with 1 additions and 1 deletions
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2
src/intel/compiler/brw_fs_copy_propagation.cpp
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@ -771,7 +771,7 @@ try_copy_propagate(const brw_compiler *compiler, fs_inst *inst,
*/
if (has_dst_aligned_region_restriction(devinfo, inst, dst_type) &&
entry_stride != 0 &&
(reg_offset(inst->dst) % REG_SIZE) != (reg_offset(entry->src) % REG_SIZE))
(reg_offset(inst->dst) % (REG_SIZE * reg_unit(devinfo))) != (reg_offset(entry->src) % (REG_SIZE * reg_unit(devinfo))))
return false;
/* The <8;8,0> regions used for FS attributes in multipolygon