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iris: Apply the flushes when switching pipelines.

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Even though the workaround description says:

   "all the listed commands are non-pipelined and hence flush caused due
   to pipeline mode change must not cause performance issues..."

My understanding is that we still need to have the flushes. Also, the
flushes are required not only to stall the pipeline, but also to clear
caches, so I don't think they can simply be discarded.

Additionally, while doing some testing that increased the number of
surface STATE_BASE_ADDRESS emitted, I got a lot more GPU hangs. Adding
these flushes fixes those hangs.

Fixes: b8fbb39a (iris: Implement Gen12 workaround for non pipelined
                 state)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3908>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3908>
This commit is contained in:
Rafael Antognolli 2020-02-20 11:02:52 -08:00 • committed by Marge Bot
parent f6d1dd34d7
commit a70a605ad6
1 changed files with 4 additions and 12 deletions
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16
src/gallium/drivers/iris/iris_state.c
View file

@ -5047,12 +5047,8 @@ iris_update_surface_base_address(struct iris_batch *batch,
* Workaround the non pipelined state not applying in MEDIA/GPGPU pipeline
* mode by putting the pipeline temporarily in 3D mode..
*/
if (batch->name == IRIS_BATCH_COMPUTE) {
iris_emit_cmd(batch, GENX(PIPELINE_SELECT), sel) {
sel.MaskBits = 3;
sel.PipelineSelection = _3D;
}
}
if (batch->name == IRIS_BATCH_COMPUTE)
emit_pipeline_select(batch, _3D);
#endif
iris_emit_cmd(batch, GENX(STATE_BASE_ADDRESS), sba) {
@ -5078,12 +5074,8 @@ iris_update_surface_base_address(struct iris_batch *batch,
*
* Put the pipeline back into compute mode.
*/
if (batch->name == IRIS_BATCH_COMPUTE) {
iris_emit_cmd(batch, GENX(PIPELINE_SELECT), sel) {
sel.MaskBits = 3;
sel.PipelineSelection = GPGPU;
}
}
if (batch->name == IRIS_BATCH_COMPUTE)
emit_pipeline_select(batch, GPGPU);
#endif
flush_after_state_base_change(batch);