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radv: Fix compute scratch buffer emission.

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Copied wrong from radeonsi. The registers following the scratch
buffer address are the shader rsrc1/rsrc2. Not the user SGPR0
containing the ring resource word 1.

Fixes: 278e533ec9 ("radv: update scratch buffer registers on GFX11")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19488>
(cherry picked from commit b8865ad046)
This commit is contained in:
Bas Nieuwenhuizen 2022-10-30 23:29:53 +01:00 • committed by Eric Engestrom
parent bf46cebc0c
commit a6bf520407
2 changed files with 3 additions and 4 deletions
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2
.pick_status.json
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@ -2452,7 +2452,7 @@
"description": "radv: Fix compute scratch buffer emission.",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "278e533ec9c29d68b661bc27cbfbe6bca4f57094"
},

5
src/amd/vulkan/radv_device.c
View file

@ -4443,13 +4443,12 @@ radv_emit_compute_scratch(struct radv_device *device, struct radeon_cmdbuf *cs,
radv_cs_add_buffer(device->ws, cs, compute_scratch_bo);
if (info->gfx_level >= GFX11) {
radeon_set_sh_reg_seq(cs, R_00B840_COMPUTE_DISPATCH_SCRATCH_BASE_LO, 4);
radeon_set_sh_reg_seq(cs, R_00B840_COMPUTE_DISPATCH_SCRATCH_BASE_LO, 2);
radeon_emit(cs, scratch_va >> 8);
radeon_emit(cs, scratch_va >> 40);
} else {
radeon_set_sh_reg_seq(cs, R_00B900_COMPUTE_USER_DATA_0, 2);
}
radeon_set_sh_reg_seq(cs, R_00B900_COMPUTE_USER_DATA_0, 2);
radeon_emit(cs, scratch_va);
radeon_emit(cs, rsrc1);