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anv/nir: Work with the new vulkan_resource_index intrinsic
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parent
3d44b3aaa6
commit
a6be53223e
2 changed files with 39 additions and 72 deletions
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@ -50,22 +50,27 @@ apply_dynamic_offsets_block(nir_block *block, void *void_state)
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unsigned block_idx_src;
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switch (intrin->intrinsic) {
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case nir_intrinsic_load_ubo_vk:
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case nir_intrinsic_load_ubo_vk_indirect:
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case nir_intrinsic_load_ssbo_vk:
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case nir_intrinsic_load_ssbo_vk_indirect:
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case nir_intrinsic_load_ubo:
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case nir_intrinsic_load_ubo_indirect:
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case nir_intrinsic_load_ssbo:
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case nir_intrinsic_load_ssbo_indirect:
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block_idx_src = 0;
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break;
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case nir_intrinsic_store_ssbo_vk:
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case nir_intrinsic_store_ssbo_vk_indirect:
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case nir_intrinsic_store_ssbo:
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case nir_intrinsic_store_ssbo_indirect:
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block_idx_src = 1;
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break;
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default:
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continue; /* the loop */
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}
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unsigned set = intrin->const_index[0];
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unsigned binding = intrin->const_index[1];
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nir_instr *res_instr = intrin->src[block_idx_src].ssa->parent_instr;
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assert(res_instr->type == nir_instr_type_intrinsic);
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nir_intrinsic_instr *res_intrin = nir_instr_as_intrinsic(res_instr);
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assert(res_intrin->intrinsic == nir_intrinsic_vulkan_resource_index);
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unsigned set = res_intrin->const_index[0];
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unsigned binding = res_intrin->const_index[1];
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set_layout = state->layout->set[set].layout;
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if (set_layout->binding[binding].dynamic_offset_index < 0)
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@ -75,11 +80,11 @@ apply_dynamic_offsets_block(nir_block *block, void *void_state)
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int indirect_src;
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switch (intrin->intrinsic) {
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case nir_intrinsic_load_ubo_vk_indirect:
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case nir_intrinsic_load_ssbo_vk_indirect:
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case nir_intrinsic_load_ubo_indirect:
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case nir_intrinsic_load_ssbo_indirect:
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indirect_src = 1;
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break;
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case nir_intrinsic_store_ssbo_vk_indirect:
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case nir_intrinsic_store_ssbo_indirect:
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indirect_src = 2;
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break;
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default:
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@ -92,7 +97,7 @@ apply_dynamic_offsets_block(nir_block *block, void *void_state)
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set_layout->binding[binding].dynamic_offset_index;
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nir_const_value *const_arr_idx =
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nir_src_as_const_value(intrin->src[block_idx_src]);
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nir_src_as_const_value(res_intrin->src[0]);
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nir_intrinsic_op offset_load_op;
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if (const_arr_idx)
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@ -109,7 +114,8 @@ apply_dynamic_offsets_block(nir_block *block, void *void_state)
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offset_load->const_index[1] = const_arr_idx->u[0];
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} else {
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offset_load->const_index[1] = 0;
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nir_src_copy(&offset_load->src[0], &intrin->src[0], &intrin->instr);
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nir_src_copy(&offset_load->src[0], &res_intrin->src[0],
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&intrin->instr);
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}
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nir_ssa_dest_init(&offset_load->instr, &offset_load->dest, 1, NULL);
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@ -130,14 +136,14 @@ apply_dynamic_offsets_block(nir_block *block, void *void_state)
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nir_intrinsic_op indirect_op;
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switch (intrin->intrinsic) {
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case nir_intrinsic_load_ubo_vk:
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indirect_op = nir_intrinsic_load_ubo_vk_indirect;
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case nir_intrinsic_load_ubo:
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indirect_op = nir_intrinsic_load_ubo_indirect;
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break;
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case nir_intrinsic_load_ssbo_vk:
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indirect_op = nir_intrinsic_load_ssbo_vk_indirect;
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case nir_intrinsic_load_ssbo:
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indirect_op = nir_intrinsic_load_ssbo_indirect;
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break;
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case nir_intrinsic_store_ssbo_vk:
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indirect_op = nir_intrinsic_store_ssbo_vk_indirect;
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case nir_intrinsic_store_ssbo:
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indirect_op = nir_intrinsic_store_ssbo_indirect;
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break;
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default:
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unreachable("Invalid direct load/store intrinsic");
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@ -34,27 +34,6 @@ struct apply_pipeline_layout_state {
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bool progress;
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};
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static nir_intrinsic_op
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lowered_op(nir_intrinsic_op op)
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{
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switch (op) {
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case nir_intrinsic_load_ubo_vk:
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return nir_intrinsic_load_ubo;
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case nir_intrinsic_load_ubo_vk_indirect:
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return nir_intrinsic_load_ubo_indirect;
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case nir_intrinsic_load_ssbo_vk:
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return nir_intrinsic_load_ssbo;
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case nir_intrinsic_load_ssbo_vk_indirect:
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return nir_intrinsic_load_ssbo_indirect;
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case nir_intrinsic_store_ssbo_vk:
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return nir_intrinsic_store_ssbo;
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case nir_intrinsic_store_ssbo_vk_indirect:
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return nir_intrinsic_store_ssbo_indirect;
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default:
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unreachable("Invalid intrinsic for lowering");
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}
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}
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static uint32_t
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get_surface_index(unsigned set, unsigned binding,
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struct apply_pipeline_layout_state *state)
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@ -76,28 +55,12 @@ get_surface_index(unsigned set, unsigned binding,
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return surface_index;
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}
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static bool
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try_lower_intrinsic(nir_intrinsic_instr *intrin,
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struct apply_pipeline_layout_state *state)
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static void
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lower_res_index_intrinsic(nir_intrinsic_instr *intrin,
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struct apply_pipeline_layout_state *state)
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{
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nir_builder *b = &state->builder;
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int block_idx_src;
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switch (intrin->intrinsic) {
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case nir_intrinsic_load_ubo_vk:
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case nir_intrinsic_load_ubo_vk_indirect:
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case nir_intrinsic_load_ssbo_vk:
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case nir_intrinsic_load_ssbo_vk_indirect:
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block_idx_src = 0;
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break;
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case nir_intrinsic_store_ssbo_vk:
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case nir_intrinsic_store_ssbo_vk_indirect:
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block_idx_src = 1;
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break;
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default:
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return false;
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}
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b->cursor = nir_before_instr(&intrin->instr);
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uint32_t set = intrin->const_index[0];
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@ -106,25 +69,19 @@ try_lower_intrinsic(nir_intrinsic_instr *intrin,
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uint32_t surface_index = get_surface_index(set, binding, state);
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nir_const_value *const_block_idx =
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nir_src_as_const_value(intrin->src[block_idx_src]);
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nir_src_as_const_value(intrin->src[0]);
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nir_ssa_def *block_index;
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if (const_block_idx) {
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block_index = nir_imm_int(b, surface_index + const_block_idx->u[0]);
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} else {
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block_index = nir_iadd(b, nir_imm_int(b, surface_index),
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nir_ssa_for_src(b, intrin->src[block_idx_src], 1));
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nir_ssa_for_src(b, intrin->src[0], 1));
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}
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nir_instr_rewrite_src(&intrin->instr, &intrin->src[block_idx_src],
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nir_src_for_ssa(block_index));
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intrin->intrinsic = lowered_op(intrin->intrinsic);
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/* Shift the offset indices down */
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intrin->const_index[0] = intrin->const_index[2];
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intrin->const_index[1] = intrin->const_index[3];
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return true;
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assert(intrin->dest.is_ssa);
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nir_ssa_def_rewrite_uses(&intrin->dest.ssa, nir_src_for_ssa(block_index));
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nir_instr_remove(&intrin->instr);
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}
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static void
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@ -177,10 +134,14 @@ apply_pipeline_layout_block(nir_block *block, void *void_state)
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nir_foreach_instr_safe(block, instr) {
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switch (instr->type) {
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case nir_instr_type_intrinsic:
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if (try_lower_intrinsic(nir_instr_as_intrinsic(instr), state))
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case nir_instr_type_intrinsic: {
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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if (intrin->intrinsic == nir_intrinsic_vulkan_resource_index) {
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lower_res_index_intrinsic(intrin, state);
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state->progress = true;
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}
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break;
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}
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case nir_instr_type_tex:
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lower_tex(nir_instr_as_tex(instr), state);
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/* All texture instructions need lowering */
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