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brw: Use brw_ip_ranges in scheduling / regalloc

Browse source 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34012>
This commit is contained in:
Caio Oliveira 2025-03-11 13:20:09 -07:00 • committed by Marge Bot
parent 3659d36087
commit a6b0783375
3 changed files with 24 additions and 18 deletions
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10
src/intel/compiler/brw_reg_allocate.cpp
View file

@ -129,10 +129,10 @@ brw_alloc_reg_sets(struct brw_compiler *compiler)
}
static int
count_to_loop_end(const bblock_t *block)
count_to_loop_end(const bblock_t *block, const brw_ip_ranges &ips)
{
if (block->end()->opcode == BRW_OPCODE_WHILE)
return block->end_ip;
return ips.end(block);
int depth = 1;
/* Skip the first block, since we don't want to count the do the calling
@ -146,7 +146,7 @@ count_to_loop_end(const bblock_t *block)
if (block->end()->opcode == BRW_OPCODE_WHILE) {
depth--;
if (depth == 0)
return block->end_ip;
return ips.end(block);
}
}
unreachable("not reached");
@ -156,6 +156,8 @@ void brw_shader::calculate_payload_ranges(bool allow_spilling,
unsigned payload_node_count,
int *payload_last_use_ip) const
{
const brw_ip_ranges &ips = this->ip_ranges_analysis.require();
int loop_depth = 0;
int loop_end_ip = 0;
@ -174,7 +176,7 @@ void brw_shader::calculate_payload_ranges(bool allow_spilling,
* the end now.
*/
if (loop_depth == 1)
loop_end_ip = count_to_loop_end(block);
loop_end_ip = count_to_loop_end(block, ips);
break;
case BRW_OPCODE_WHILE:
loop_depth--;

25
src/intel/compiler/brw_schedule_instructions.cpp
View file

@ -594,7 +594,7 @@ public:
void add_dep(schedule_node *before, schedule_node *after);
void add_address_dep(schedule_node *before, schedule_node *after);
void set_current_block(bblock_t *block);
void set_current_block(bblock_t *block, const brw_ip_ranges &ips);
void compute_delays();
void compute_exits();
@ -781,8 +781,10 @@ brw_instruction_scheduler::brw_instruction_scheduler(void *mem_ctx, const brw_sh
this->hw_reads_remaining = NULL;
}
const brw_ip_ranges &ips = s->ip_ranges_analysis.require();
foreach_block(block, s->cfg) {
set_current_block(block);
set_current_block(block, ips);
for (schedule_node *n = current.start; n < current.end; n++)
n->issue_time = calculate_issue_time(n->inst);
@ -828,6 +830,7 @@ void
brw_instruction_scheduler::setup_liveness(cfg_t *cfg)
{
const brw_live_variables &live = s->live_analysis.require();
const brw_ip_ranges &ips = s->ip_ranges_analysis.require();
/* First, compute liveness on a per-GRF level using the in/out sets from
* liveness calculation.
@ -853,8 +856,8 @@ brw_instruction_scheduler::setup_liveness(cfg_t *cfg)
*/
for (int block = 0; block < cfg->num_blocks - 1; block++) {
for (int i = 0; i < grf_count; i++) {
if (live.vgrf_start[i] <= cfg->blocks[block]->end_ip &&
live.vgrf_end[i] >= cfg->blocks[block + 1]->start_ip) {
if (live.vgrf_start[i] <= ips.end(cfg->blocks[block]) &&
live.vgrf_end[i] >= ips.start(cfg->blocks[block + 1])) {
if (!BITSET_TEST(livein[block + 1], i)) {
reg_pressure_in[block + 1] += s->alloc.sizes[i];
BITSET_SET(livein[block + 1], i);
@ -873,10 +876,10 @@ brw_instruction_scheduler::setup_liveness(cfg_t *cfg)
continue;
for (int block = 0; block < cfg->num_blocks; block++) {
if (cfg->blocks[block]->start_ip <= payload_last_use_ip[i])
if (ips.start(cfg->blocks[block]) <= payload_last_use_ip[i])
reg_pressure_in[block]++;
if (cfg->blocks[block]->end_ip <= payload_last_use_ip[i])
if (ips.end(cfg->blocks[block]) <= payload_last_use_ip[i])
BITSET_SET(hw_liveout[block], i);
}
}
@ -944,11 +947,11 @@ brw_instruction_scheduler::get_register_pressure_benefit(const brw_inst *inst)
}
void
brw_instruction_scheduler::set_current_block(bblock_t *block)
brw_instruction_scheduler::set_current_block(bblock_t *block, const brw_ip_ranges &ips)
{
current.block = block;
current.start = nodes + block->start_ip;
current.len = block->end_ip - block->start_ip + 1;
current.start = nodes + ips.start(block);
current.len = block->num_instructions;
current.end = current.start + current.len;
current.time = 0;
current.scheduled = 0;
@ -1807,8 +1810,10 @@ brw_instruction_scheduler::run(brw_instruction_scheduler_mode mode)
memset(written, 0, grf_count * sizeof(*written));
}
const brw_ip_ranges &ips = s->ip_ranges_analysis.require();
foreach_block(block, s->cfg) {
set_current_block(block);
set_current_block(block, ips);
if (!post_reg_alloc) {
for (schedule_node *n = current.start; n < current.end; n++)

7
src/intel/compiler/brw_shader.cpp
View file

@ -1017,7 +1017,6 @@ save_instruction_order(const struct cfg_t *cfg)
int ip = 0;
foreach_block_and_inst(block, brw_inst, inst, cfg) {
assert(ip >= block->start_ip && ip <= block->end_ip);
inst_arr[ip++] = inst;
}
assert(ip == num_insts);
@ -1034,9 +1033,8 @@ restore_instruction_order(struct cfg_t *cfg, brw_inst **inst_arr)
foreach_block (block, cfg) {
block->instructions.make_empty();
assert(ip == block->start_ip);
for (; ip <= block->end_ip; ip++)
block->instructions.push_tail(inst_arr[ip]);
for (unsigned i = 0; i < block->num_instructions; i++)
block->instructions.push_tail(inst_arr[ip++]);
}
assert(ip == num_insts);
}
@ -1134,6 +1132,7 @@ brw_allocate_registers(brw_shader &s, bool allow_spilling)
/* Reset back to the original order before trying the next mode */
restore_instruction_order(s.cfg, orig_order);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS);
}