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aco: implement <32-bit masked_swizzle_amd

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This is needed since we will be lowering some 8/16-bit shuffles to
masked_swizzle_amd.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5695>
This commit is contained in:
Rhys Perry 2020-07-02 12:15:28 +01:00 • committed by Marge Bot
parent d377fbf95d
commit a6a731bea5
1 changed files with 14 additions and 4 deletions
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18
src/amd/compiler/aco_instruction_selection.cpp
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@ -7951,10 +7951,20 @@ void visit_intrinsic(isel_context *ctx, nir_intrinsic_instr *instr)
}
Temp dst = get_ssa_temp(ctx, &instr->dest.ssa);
uint32_t mask = nir_intrinsic_swizzle_mask(instr);
if (dst.regClass() == v1) {
emit_wqm(ctx,
emit_masked_swizzle(ctx, bld, src, mask),
dst);
if (instr->dest.ssa.bit_size == 1) {
assert(src.regClass() == bld.lm);
src = bld.vop2_e64(aco_opcode::v_cndmask_b32, bld.def(v1), Operand(0u), Operand((uint32_t)-1), src);
src = emit_masked_swizzle(ctx, bld, src, mask);
Temp tmp = bld.vopc(aco_opcode::v_cmp_lg_u32, bld.def(bld.lm), Operand(0u), src);
emit_wqm(ctx, tmp, dst);
} else if (dst.regClass() == v1b) {
Temp tmp = emit_wqm(ctx, emit_masked_swizzle(ctx, bld, src, mask));
emit_extract_vector(ctx, tmp, 0, dst);
} else if (dst.regClass() == v2b) {
Temp tmp = emit_wqm(ctx, emit_masked_swizzle(ctx, bld, src, mask));
emit_extract_vector(ctx, tmp, 0, dst);
} else if (dst.regClass() == v1) {
emit_wqm(ctx, emit_masked_swizzle(ctx, bld, src, mask), dst);
} else if (dst.regClass() == v2) {
Temp lo = bld.tmp(v1), hi = bld.tmp(v1);
bld.pseudo(aco_opcode::p_split_vector, Definition(lo), Definition(hi), src);