i965/fs: Rename virtual_grf_next to virtual_grf_count.

"count" is a more useful name, since most of the time we're using it for
looping over the variables.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Eric Anholt 2012-07-06 13:45:53 -07:00
parent 40cd60a315
commit a6411520b4
6 changed files with 21 additions and 22 deletions

View file

@ -416,7 +416,7 @@ fs_visitor::implied_mrf_writes(fs_inst *inst)
int
fs_visitor::virtual_grf_alloc(int size)
{
if (virtual_grf_array_size <= virtual_grf_next) {
if (virtual_grf_array_size <= virtual_grf_count) {
if (virtual_grf_array_size == 0)
virtual_grf_array_size = 16;
else
@ -424,8 +424,8 @@ fs_visitor::virtual_grf_alloc(int size)
virtual_grf_sizes = reralloc(mem_ctx, virtual_grf_sizes, int,
virtual_grf_array_size);
}
virtual_grf_sizes[virtual_grf_next] = size;
return virtual_grf_next++;
virtual_grf_sizes[virtual_grf_count] = size;
return virtual_grf_count++;
}
/** Fixed HW reg constructor. */
@ -1037,7 +1037,7 @@ fs_visitor::assign_urb_setup()
void
fs_visitor::split_virtual_grfs()
{
int num_vars = this->virtual_grf_next;
int num_vars = this->virtual_grf_count;
bool split_grf[num_vars];
int new_virtual_grf[num_vars];
@ -2031,7 +2031,6 @@ fs_visitor::run()
if (0) {
/* Debug of register spilling: Go spill everything. */
int virtual_grf_count = virtual_grf_next;
for (int i = 0; i < virtual_grf_count; i++) {
spill_reg(i);
}

View file

@ -351,7 +351,7 @@ public:
int param_offset[MAX_UNIFORMS * 4];
int *virtual_grf_sizes;
int virtual_grf_next;
int virtual_grf_count;
int virtual_grf_array_size;
int *virtual_grf_def;
int *virtual_grf_use;

View file

@ -137,7 +137,7 @@ fs_live_variables::fs_live_variables(fs_visitor *v, fs_cfg *cfg)
{
mem_ctx = ralloc_context(cfg->mem_ctx);
num_vars = v->virtual_grf_next;
num_vars = v->virtual_grf_count;
bd = rzalloc_array(mem_ctx, struct block_data, cfg->num_blocks);
vars = rzalloc_array(mem_ctx, struct var, num_vars);
@ -162,7 +162,7 @@ fs_live_variables::~fs_live_variables()
void
fs_visitor::calculate_live_intervals()
{
int num_vars = this->virtual_grf_next;
int num_vars = this->virtual_grf_count;
if (this->live_intervals_valid)
return;

View file

@ -43,17 +43,17 @@ assign_reg(int *reg_hw_locations, fs_reg *reg, int reg_width)
void
fs_visitor::assign_regs_trivial()
{
int hw_reg_mapping[this->virtual_grf_next + 1];
int hw_reg_mapping[this->virtual_grf_count + 1];
int i;
int reg_width = c->dispatch_width / 8;
/* Note that compressed instructions require alignment to 2 registers. */
hw_reg_mapping[0] = ALIGN(this->first_non_payload_grf, reg_width);
for (i = 1; i <= this->virtual_grf_next; i++) {
for (i = 1; i <= this->virtual_grf_count; i++) {
hw_reg_mapping[i] = (hw_reg_mapping[i - 1] +
this->virtual_grf_sizes[i - 1] * reg_width);
}
this->grf_used = hw_reg_mapping[this->virtual_grf_next];
this->grf_used = hw_reg_mapping[this->virtual_grf_count];
foreach_list(node, &this->instructions) {
fs_inst *inst = (fs_inst *)node;
@ -155,7 +155,7 @@ fs_visitor::assign_regs()
* for reg_width == 2.
*/
int reg_width = c->dispatch_width / 8;
int hw_reg_mapping[this->virtual_grf_next];
int hw_reg_mapping[this->virtual_grf_count];
int first_assigned_grf = ALIGN(this->first_non_payload_grf, reg_width);
int base_reg_count = (max_grf - first_assigned_grf) / reg_width;
int class_sizes[base_reg_count];
@ -178,7 +178,7 @@ fs_visitor::assign_regs()
*/
class_sizes[class_count++] = 2;
}
for (int r = 0; r < this->virtual_grf_next; r++) {
for (int r = 0; r < this->virtual_grf_count; r++) {
int i;
for (i = 0; i < class_count; i++) {
@ -198,9 +198,9 @@ fs_visitor::assign_regs()
reg_width, base_reg_count);
struct ra_graph *g = ra_alloc_interference_graph(brw->wm.regs,
this->virtual_grf_next);
this->virtual_grf_count);
for (int i = 0; i < this->virtual_grf_next; i++) {
for (int i = 0; i < this->virtual_grf_count; i++) {
for (int c = 0; c < class_count; c++) {
if (class_sizes[c] == this->virtual_grf_sizes[i]) {
/* Special case: on pre-GEN6 hardware that supports PLN, the
@ -254,7 +254,7 @@ fs_visitor::assign_regs()
* numbers.
*/
this->grf_used = first_assigned_grf;
for (int i = 0; i < this->virtual_grf_next; i++) {
for (int i = 0; i < this->virtual_grf_count; i++) {
int reg = ra_get_node_reg(g, i);
hw_reg_mapping[i] = (first_assigned_grf +
@ -305,10 +305,10 @@ int
fs_visitor::choose_spill_reg(struct ra_graph *g)
{
float loop_scale = 1.0;
float spill_costs[this->virtual_grf_next];
bool no_spill[this->virtual_grf_next];
float spill_costs[this->virtual_grf_count];
bool no_spill[this->virtual_grf_count];
for (int i = 0; i < this->virtual_grf_next; i++) {
for (int i = 0; i < this->virtual_grf_count; i++) {
spill_costs[i] = 0.0;
no_spill[i] = false;
}
@ -357,7 +357,7 @@ fs_visitor::choose_spill_reg(struct ra_graph *g)
}
}
for (int i = 0; i < this->virtual_grf_next; i++) {
for (int i = 0; i < this->virtual_grf_count; i++) {
if (!no_spill[i])
ra_set_node_spill_cost(g, i, spill_costs[i]);
}

View file

@ -503,7 +503,7 @@ void
fs_visitor::schedule_instructions()
{
fs_inst *next_block_header = (fs_inst *)instructions.head;
instruction_scheduler sched(this, mem_ctx, this->virtual_grf_next);
instruction_scheduler sched(this, mem_ctx, this->virtual_grf_count);
while (!next_block_header->is_tail_sentinel()) {
/* Add things to be scheduled until we get to a new BB. */

View file

@ -2224,7 +2224,7 @@ fs_visitor::fs_visitor(struct brw_wm_compile *c, struct gl_shader_program *prog,
this->base_ir = NULL;
this->virtual_grf_sizes = NULL;
this->virtual_grf_next = 0;
this->virtual_grf_count = 0;
this->virtual_grf_array_size = 0;
this->virtual_grf_def = NULL;
this->virtual_grf_use = NULL;