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https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-01-30 22:20:27 +01:00
zink: use more dynamic state3 when available
this is an all-or-nothing type of thing, where either all the blend/ms states are available or they aren't Reviewed-by: Adam Jackson <ajax@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18890>
This commit is contained in:
parent
c7f46d2ad6
commit
a5b8466e4a
7 changed files with 116 additions and 36 deletions
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@ -2879,6 +2879,7 @@ zink_set_framebuffer_state(struct pipe_context *pctx,
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const struct pipe_framebuffer_state *state)
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{
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struct zink_context *ctx = zink_context(pctx);
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struct zink_screen *screen = zink_screen(pctx->screen);
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unsigned samples = state->nr_cbufs || state->zsbuf ? 0 : state->samples;
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unsigned w = ctx->fb_state.width;
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unsigned h = ctx->fb_state.height;
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@ -2932,6 +2933,8 @@ zink_set_framebuffer_state(struct pipe_context *pctx,
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/* renderpass changes if the number or types of attachments change */
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ctx->rp_changed |= ctx->fb_state.nr_cbufs != state->nr_cbufs;
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ctx->rp_changed |= !!ctx->fb_state.zsbuf != !!state->zsbuf;
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if (ctx->fb_state.nr_cbufs != state->nr_cbufs)
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ctx->blend_state_changed |= screen->have_full_ds3;
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util_copy_framebuffer_state(&ctx->fb_state, state);
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zink_update_fbfetch(ctx);
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@ -3030,7 +3033,10 @@ zink_set_framebuffer_state(struct pipe_context *pctx,
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zink_update_fs_key_samples(ctx);
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if (ctx->gfx_pipeline_state.rast_samples != rast_samples) {
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ctx->sample_locations_changed |= ctx->gfx_pipeline_state.sample_locations_enabled;
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ctx->gfx_pipeline_state.dirty = true;
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if (screen->have_full_ds3)
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ctx->sample_mask_changed = true;
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else
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ctx->gfx_pipeline_state.dirty = true;
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}
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ctx->gfx_pipeline_state.rast_samples = rast_samples;
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@ -3054,7 +3060,10 @@ zink_set_sample_mask(struct pipe_context *pctx, unsigned sample_mask)
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{
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struct zink_context *ctx = zink_context(pctx);
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ctx->gfx_pipeline_state.sample_mask = sample_mask;
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ctx->gfx_pipeline_state.dirty = true;
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if (zink_screen(pctx->screen)->have_full_ds3)
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ctx->sample_mask_changed = true;
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else
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ctx->gfx_pipeline_state.dirty = true;
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}
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static void
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@ -4631,6 +4640,7 @@ zink_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags)
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screen->info.have_EXT_vertex_input_dynamic_state;
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ctx->compute_pipeline_state.dirty = true;
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ctx->fb_changed = ctx->rp_changed = true;
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ctx->sample_mask_changed = true;
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ctx->gfx_pipeline_state.gfx_prim_mode = PIPE_PRIM_MAX;
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zink_init_draw_functions(ctx, screen);
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@ -647,6 +647,23 @@ zink_draw(struct pipe_context *pctx,
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VKCTX(CmdSetLineRasterizationModeEXT)(batch->state->cmdbuf, (VkLineRasterizationModeEXT)rast_state->hw_state.line_mode);
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VKCTX(CmdSetLineStippleEnableEXT)(batch->state->cmdbuf, rast_state->hw_state.line_stipple_enable);
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}
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if ((BATCH_CHANGED || ctx->sample_mask_changed) && screen->have_full_ds3) {
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VKCTX(CmdSetRasterizationSamplesEXT)(batch->state->cmdbuf, (VkSampleCountFlagBits)(ctx->gfx_pipeline_state.rast_samples + 1));
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VKCTX(CmdSetSampleMaskEXT)(batch->state->cmdbuf, (VkSampleCountFlagBits)(ctx->gfx_pipeline_state.rast_samples + 1), &ctx->gfx_pipeline_state.sample_mask);
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ctx->sample_mask_changed = false;
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}
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if ((BATCH_CHANGED || ctx->blend_state_changed) && screen->have_full_ds3) {
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if (ctx->gfx_pipeline_state.blend_state) {
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VKCTX(CmdSetAlphaToCoverageEnableEXT)(batch->state->cmdbuf, ctx->gfx_pipeline_state.blend_state->alpha_to_coverage);
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if (screen->info.feats.features.alphaToOne)
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VKCTX(CmdSetAlphaToOneEnableEXT)(batch->state->cmdbuf, ctx->gfx_pipeline_state.blend_state->alpha_to_one);
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VKCTX(CmdSetColorBlendEnableEXT)(batch->state->cmdbuf, 0, ctx->fb_state.nr_cbufs, ctx->gfx_pipeline_state.blend_state->ds3.enables);
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VKCTX(CmdSetColorWriteMaskEXT)(batch->state->cmdbuf, 0, ctx->fb_state.nr_cbufs, ctx->gfx_pipeline_state.blend_state->ds3.wrmask);
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VKCTX(CmdSetColorBlendEquationEXT)(batch->state->cmdbuf, 0, ctx->fb_state.nr_cbufs, ctx->gfx_pipeline_state.blend_state->ds3.eq);
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VKCTX(CmdSetLogicOpEnableEXT)(batch->state->cmdbuf, ctx->gfx_pipeline_state.blend_state->logicop_enable);
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VKCTX(CmdSetLogicOpEXT)(batch->state->cmdbuf, ctx->gfx_pipeline_state.blend_state->logicop_func);
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}
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}
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if (BATCH_CHANGED || rast_state_changed) {
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enum pipe_prim_type reduced_prim = ctx->last_vertex_stage->reduced_prim;
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@ -35,16 +35,6 @@
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#include "util/u_debug.h"
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#include "util/u_prim.h"
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static VkBlendFactor
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clamp_void_blend_factor(VkBlendFactor f)
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{
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if (f == VK_BLEND_FACTOR_ONE_MINUS_DST_ALPHA)
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return VK_BLEND_FACTOR_ZERO;
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if (f == VK_BLEND_FACTOR_DST_ALPHA)
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return VK_BLEND_FACTOR_ONE;
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return f;
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}
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VkPipeline
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zink_create_gfx_pipeline(struct zink_screen *screen,
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struct zink_gfx_program *prog,
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@ -210,7 +200,7 @@ zink_create_gfx_pipeline(struct zink_screen *screen,
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depth_stencil_state.back = state->dyn_state1.depth_stencil_alpha_state->stencil_back;
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depth_stencil_state.depthWriteEnable = state->dyn_state1.depth_stencil_alpha_state->depth_write;
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VkDynamicState dynamicStateEnables[64] = {
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VkDynamicState dynamicStateEnables[80] = {
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VK_DYNAMIC_STATE_LINE_WIDTH,
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VK_DYNAMIC_STATE_DEPTH_BIAS,
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VK_DYNAMIC_STATE_BLEND_CONSTANTS,
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@ -257,6 +247,20 @@ zink_create_gfx_pipeline(struct zink_screen *screen,
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_LINE_RASTERIZATION_MODE_EXT;
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_LINE_STIPPLE_ENABLE_EXT;
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_LINE_STIPPLE_EXT;
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if (screen->have_full_ds3) {
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_SAMPLE_MASK_EXT;
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_RASTERIZATION_SAMPLES_EXT;
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if (state->blend_state) {
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_LOGIC_OP_EXT;
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_LOGIC_OP_ENABLE_EXT;
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_ALPHA_TO_COVERAGE_ENABLE_EXT;
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if (screen->info.feats.features.alphaToOne)
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_ALPHA_TO_ONE_ENABLE_EXT;
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_COLOR_BLEND_ENABLE_EXT;
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_COLOR_BLEND_EQUATION_EXT;
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_COLOR_WRITE_MASK_EXT;
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}
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}
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}
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if (screen->info.have_EXT_color_write_enable)
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_COLOR_WRITE_ENABLE_EXT;
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@ -454,32 +458,12 @@ zink_create_gfx_pipeline_output(struct zink_screen *screen, struct zink_gfx_pipe
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VkPipelineColorBlendStateCreateInfo blend_state = {0};
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blend_state.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO;
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if (state->blend_state) {
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unsigned num_attachments = state->rendering_info.colorAttachmentCount;
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blend_state.pAttachments = state->blend_state->attachments;
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blend_state.attachmentCount = num_attachments;
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blend_state.logicOpEnable = state->blend_state->logicop_enable;
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blend_state.attachmentCount = state->rendering_info.colorAttachmentCount;
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if (state->blend_state)
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blend_state.logicOp = state->blend_state->logicop_func;
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}
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VkPipelineMultisampleStateCreateInfo ms_state = {0};
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ms_state.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO;
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ms_state.rasterizationSamples = state->rast_samples + 1;
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if (state->blend_state) {
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ms_state.alphaToCoverageEnable = state->blend_state->alpha_to_coverage;
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if (state->blend_state->alpha_to_one && !screen->info.feats.features.alphaToOne) {
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static bool warned = false;
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warn_missing_feature(warned, "alphaToOne");
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}
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ms_state.alphaToOneEnable = state->blend_state->alpha_to_one;
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}
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/* "If pSampleMask is NULL, it is treated as if the mask has all bits set to 1."
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* - Chapter 27. Rasterization
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*
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* thus it never makes sense to leave this as NULL since gallium will provide correct
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* data here as long as sample_mask is initialized on context creation
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*/
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ms_state.pSampleMask = &state->sample_mask;
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if (state->force_persample_interp) {
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ms_state.sampleShadingEnable = VK_TRUE;
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ms_state.minSampleShading = 1.0;
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@ -498,6 +482,48 @@ zink_create_gfx_pipeline_output(struct zink_screen *screen, struct zink_gfx_pipe
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}
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if (screen->info.have_EXT_color_write_enable)
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_COLOR_WRITE_ENABLE_EXT;
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if (screen->have_full_ds3) {
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_SAMPLE_MASK_EXT;
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_RASTERIZATION_SAMPLES_EXT;
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if (state->blend_state) {
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_LOGIC_OP_EXT;
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_LOGIC_OP_ENABLE_EXT;
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_ALPHA_TO_COVERAGE_ENABLE_EXT;
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if (screen->info.feats.features.alphaToOne)
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_ALPHA_TO_ONE_ENABLE_EXT;
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_COLOR_BLEND_ENABLE_EXT;
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_COLOR_BLEND_EQUATION_EXT;
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dynamicStateEnables[state_count++] = VK_DYNAMIC_STATE_COLOR_WRITE_MASK_EXT;
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}
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} else {
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if (state->blend_state) {
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unsigned num_attachments = state->render_pass ?
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state->render_pass->state.num_rts :
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state->rendering_info.colorAttachmentCount;
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if (state->render_pass && state->render_pass->state.have_zsbuf)
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num_attachments--;
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blend_state.pAttachments = state->blend_state->attachments;
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blend_state.attachmentCount = num_attachments;
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blend_state.logicOpEnable = state->blend_state->logicop_enable;
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blend_state.logicOp = state->blend_state->logicop_func;
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ms_state.alphaToCoverageEnable = state->blend_state->alpha_to_coverage;
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if (state->blend_state->alpha_to_one && !screen->info.feats.features.alphaToOne) {
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static bool warned = false;
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warn_missing_feature(warned, "alphaToOne");
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}
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ms_state.alphaToOneEnable = state->blend_state->alpha_to_one;
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}
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ms_state.rasterizationSamples = state->rast_samples + 1;
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/* "If pSampleMask is NULL, it is treated as if the mask has all bits set to 1."
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* - Chapter 27. Rasterization
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*
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* thus it never makes sense to leave this as NULL since gallium will provide correct
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* data here as long as sample_mask is initialized on context creation
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*/
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ms_state.pSampleMask = &state->sample_mask;
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}
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assert(state_count < ARRAY_SIZE(dynamicStateEnables));
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VkPipelineDynamicStateCreateInfo pipelineDynamicStateCreateInfo = {0};
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@ -2250,6 +2250,15 @@ init_driver_workarounds(struct zink_screen *screen)
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!screen->info.dynamic_state3_feats.extendedDynamicState3ProvokingVertexMode ||
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!screen->info.dynamic_state3_feats.extendedDynamicState3LineRasterizationMode)
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screen->info.have_EXT_extended_dynamic_state3 = false;
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else if (screen->info.dynamic_state3_feats.extendedDynamicState3SampleMask &&
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screen->info.dynamic_state3_feats.extendedDynamicState3AlphaToCoverageEnable &&
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(!screen->info.feats.features.alphaToOne || screen->info.dynamic_state3_feats.extendedDynamicState3AlphaToOneEnable) &&
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screen->info.dynamic_state3_feats.extendedDynamicState3ColorBlendEnable &&
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screen->info.dynamic_state3_feats.extendedDynamicState3RasterizationSamples &&
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screen->info.dynamic_state3_feats.extendedDynamicState3ColorWriteMask &&
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screen->info.dynamic_state3_feats.extendedDynamicState3LogicOpEnable &&
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screen->info.dynamic_state2_feats.extendedDynamicState2LogicOp)
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screen->have_full_ds3 = true;
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if (screen->info.have_EXT_graphics_pipeline_library)
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screen->info.have_EXT_graphics_pipeline_library = screen->info.have_EXT_extended_dynamic_state &&
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screen->info.have_EXT_extended_dynamic_state2 &&
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@ -406,6 +406,15 @@ zink_create_blend_state(struct pipe_context *pctx,
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att.colorWriteMask |= VK_COLOR_COMPONENT_A_BIT;
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cso->attachments[i] = att;
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cso->ds3.enables[i] = att.blendEnable;
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cso->ds3.eq[i].alphaBlendOp = att.alphaBlendOp;
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cso->ds3.eq[i].dstAlphaBlendFactor = att.dstAlphaBlendFactor;
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cso->ds3.eq[i].srcAlphaBlendFactor = att.srcAlphaBlendFactor;
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cso->ds3.eq[i].colorBlendOp = att.colorBlendOp;
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cso->ds3.eq[i].dstColorBlendFactor = att.dstColorBlendFactor;
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cso->ds3.eq[i].srcColorBlendFactor = att.srcColorBlendFactor;
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cso->ds3.wrmask[i] = att.colorWriteMask;
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}
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cso->dual_src_blend = util_blend_state_is_dual(blend_state, 0);
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@ -422,7 +431,7 @@ zink_bind_blend_state(struct pipe_context *pctx, void *cso)
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if (state->blend_state != cso) {
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state->blend_state = cso;
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state->blend_id = blend ? blend->hash : 0;
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state->dirty = true;
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state->dirty |= !zink_screen(pctx->screen)->have_full_ds3;
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bool force_dual_color_blend = zink_screen(pctx->screen)->driconf.dual_color_blend_by_location &&
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blend && blend->dual_src_blend && state->blend_state->attachments[0].blendEnable;
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if (force_dual_color_blend != zink_get_fs_key(ctx)->force_dual_color_blend)
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@ -56,6 +56,7 @@ zink_cache_vertex_state_destroy(struct pipe_screen *pscreen, struct pipe_vertex_
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const struct zink_vertex_elements_hw_state *
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zink_vertex_state_mask(struct pipe_vertex_state *vstate, uint32_t partial_velem_mask, bool have_EXT_vertex_input_dynamic_state);
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#ifdef __cplusplus
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}
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#endif
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@ -274,6 +274,12 @@ struct zink_blend_state {
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uint32_t hash;
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VkPipelineColorBlendAttachmentState attachments[PIPE_MAX_COLOR_BUFS];
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struct {
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VkBool32 enables[PIPE_MAX_COLOR_BUFS];
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VkColorBlendEquationEXT eq[PIPE_MAX_COLOR_BUFS];
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VkColorComponentFlags wrmask[PIPE_MAX_COLOR_BUFS];
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} ds3;
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VkBool32 logicop_enable;
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VkLogicOp logicop_func;
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@ -1134,6 +1140,7 @@ struct zink_screen {
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struct nir_shader_compiler_options nir_options;
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bool optimal_keys;
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bool have_full_ds3;
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bool have_X8_D24_UNORM_PACK32;
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bool have_D24_UNORM_S8_UINT;
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bool have_D32_SFLOAT_S8_UINT;
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@ -1573,6 +1580,7 @@ struct zink_context {
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bool primitive_restart;
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bool vertex_state_changed : 1;
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bool blend_state_changed : 1;
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bool sample_mask_changed : 1;
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bool rast_state_changed : 1;
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bool dsa_state_changed : 1;
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bool stencil_ref_changed : 1;
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