From a56bb2d54507ffce24fc2c5257560d74c1db153b Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Wed, 21 Oct 2020 18:57:53 +0100 Subject: [PATCH] ac/llvm: implement implement load_{scalar,vector}_arg_amd and load_smem_amd MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Rhys Perry Reviewed-by: Samuel Pitoiset Reviewed-by: Timur Kristóf Part-of: --- src/amd/llvm/ac_nir_to_llvm.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c index f8d1deb2fcd..0fdb4944c2d 100644 --- a/src/amd/llvm/ac_nir_to_llvm.c +++ b/src/amd/llvm/ac_nir_to_llvm.c @@ -4335,6 +4335,29 @@ static void visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *ins case nir_intrinsic_load_force_vrs_rates_amd: result = ac_get_arg(&ctx->ac, ctx->args->force_vrs_rates); break; + case nir_intrinsic_load_scalar_arg_amd: + case nir_intrinsic_load_vector_arg_amd: { + assert(nir_intrinsic_base(instr) < AC_MAX_ARGS); + result = ac_to_integer(&ctx->ac, LLVMGetParam(ctx->main_function, nir_intrinsic_base(instr))); + break; + } + case nir_intrinsic_load_smem_amd: { + LLVMValueRef base = get_src(ctx, instr->src[0]); + LLVMValueRef offset = get_src(ctx, instr->src[1]); + + LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa); + LLVMTypeRef ptr_type = LLVMPointerType(result_type, AC_ADDR_SPACE_CONST); + LLVMTypeRef byte_ptr_type = LLVMPointerType(ctx->ac.i8, AC_ADDR_SPACE_CONST); + + LLVMValueRef addr = LLVMBuildIntToPtr(ctx->ac.builder, base, byte_ptr_type, ""); + addr = LLVMBuildGEP(ctx->ac.builder, addr, &offset, 1, ""); + addr = LLVMBuildBitCast(ctx->ac.builder, addr, ptr_type, ""); + + LLVMSetMetadata(addr, ctx->ac.uniform_md_kind, ctx->ac.empty_md); + result = LLVMBuildLoad(ctx->ac.builder, addr, ""); + LLVMSetMetadata(result, ctx->ac.invariant_load_md_kind, ctx->ac.empty_md); + break; + } default: fprintf(stderr, "Unknown intrinsic: "); nir_print_instr(&instr->instr, stderr);