mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-05 11:48:06 +02:00
svga: Further cleanup/comment svga buffer code.
Just cosmetic changes -- no behavior change.
This commit is contained in:
José Fonseca
parent
770945cff4
commit
a51d638ff3
2 changed files with 142 additions and 112 deletions
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@ -83,7 +83,7 @@ svga_buffer_create_host_surface(struct svga_screen *ss,
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* as svga_screen_surface_create might have passed a recycled host
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* buffer.
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*/
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sbuf->hw.flags.discard = TRUE;
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sbuf->dma.flags.discard = TRUE;
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SVGA_DBG(DEBUG_DMA, " --> got sid %p sz %d (buffer)\n", sbuf->handle, sbuf->base.size);
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}
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@ -109,10 +109,10 @@ svga_buffer_destroy_hw_storage(struct svga_screen *ss, struct svga_buffer *sbuf)
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struct svga_winsys_screen *sws = ss->sws;
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assert(!sbuf->map.count);
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assert(sbuf->hw.buf);
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if(sbuf->hw.buf) {
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sws->buffer_destroy(sws, sbuf->hw.buf);
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sbuf->hw.buf = NULL;
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assert(sbuf->hwbuf);
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if(sbuf->hwbuf) {
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sws->buffer_destroy(sws, sbuf->hwbuf);
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sbuf->hwbuf = NULL;
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}
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}
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@ -151,16 +151,16 @@ static INLINE enum pipe_error
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svga_buffer_create_hw_storage(struct svga_screen *ss,
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struct svga_buffer *sbuf)
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{
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if(!sbuf->hw.buf) {
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if(!sbuf->hwbuf) {
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unsigned alignment = sbuf->base.alignment;
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unsigned usage = 0;
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unsigned size = sbuf->base.size;
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sbuf->hw.buf = svga_winsys_buffer_create(ss, alignment, usage, size);
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if(!sbuf->hw.buf)
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sbuf->hwbuf = svga_winsys_buffer_create(ss, alignment, usage, size);
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if(!sbuf->hwbuf)
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return PIPE_ERROR_OUT_OF_MEMORY;
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assert(!sbuf->needs_flush);
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assert(!sbuf->dma.pending);
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}
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return PIPE_OK;
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@ -175,12 +175,12 @@ svga_buffer_upload_command(struct svga_context *svga,
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struct svga_buffer *sbuf)
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{
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struct svga_winsys_context *swc = svga->swc;
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struct svga_winsys_buffer *guest = sbuf->hw.buf;
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struct svga_winsys_buffer *guest = sbuf->hwbuf;
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struct svga_winsys_surface *host = sbuf->handle;
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SVGA3dTransferType transfer = SVGA3D_WRITE_HOST_VRAM;
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SVGA3dSurfaceDMAFlags flags = sbuf->hw.flags;
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SVGA3dSurfaceDMAFlags flags = sbuf->dma.flags;
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SVGA3dCmdSurfaceDMA *cmd;
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uint32 numBoxes = sbuf->hw.num_ranges;
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uint32 numBoxes = sbuf->map.num_ranges;
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SVGA3dCopyBox *boxes;
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SVGA3dCmdSurfaceDMASuffix *pSuffix;
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unsigned region_flags;
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@ -218,8 +218,8 @@ svga_buffer_upload_command(struct svga_context *svga,
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cmd->transfer = transfer;
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sbuf->hw.boxes = (SVGA3dCopyBox *)&cmd[1];
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sbuf->hw.svga = svga;
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sbuf->dma.boxes = (SVGA3dCopyBox *)&cmd[1];
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sbuf->dma.svga = svga;
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/* Increment reference count */
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dummy = NULL;
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@ -248,10 +248,10 @@ svga_buffer_upload_flush(struct svga_context *svga,
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unsigned i;
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assert(sbuf->handle);
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assert(sbuf->hw.buf);
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assert(sbuf->hw.num_ranges);
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assert(sbuf->hw.svga == svga);
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assert(sbuf->hw.boxes);
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assert(sbuf->hwbuf);
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assert(sbuf->map.num_ranges);
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assert(sbuf->dma.svga == svga);
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assert(sbuf->dma.boxes);
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/*
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* Patch the DMA command with the final copy box.
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@ -259,34 +259,34 @@ svga_buffer_upload_flush(struct svga_context *svga,
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SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
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boxes = sbuf->hw.boxes;
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for(i = 0; i < sbuf->hw.num_ranges; ++i) {
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boxes = sbuf->dma.boxes;
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for(i = 0; i < sbuf->map.num_ranges; ++i) {
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SVGA_DBG(DEBUG_DMA, " bytes %u - %u\n",
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sbuf->hw.ranges[i].start, sbuf->hw.ranges[i].end);
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sbuf->map.ranges[i].start, sbuf->map.ranges[i].end);
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boxes[i].x = sbuf->hw.ranges[i].start;
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boxes[i].x = sbuf->map.ranges[i].start;
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boxes[i].y = 0;
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boxes[i].z = 0;
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boxes[i].w = sbuf->hw.ranges[i].end - sbuf->hw.ranges[i].start;
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boxes[i].w = sbuf->map.ranges[i].end - sbuf->map.ranges[i].start;
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boxes[i].h = 1;
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boxes[i].d = 1;
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boxes[i].srcx = sbuf->hw.ranges[i].start;
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boxes[i].srcx = sbuf->map.ranges[i].start;
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boxes[i].srcy = 0;
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boxes[i].srcz = 0;
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}
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sbuf->hw.num_ranges = 0;
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memset(&sbuf->hw.flags, 0, sizeof sbuf->hw.flags);
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sbuf->map.num_ranges = 0;
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memset(&sbuf->dma.flags, 0, sizeof sbuf->dma.flags);
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assert(sbuf->head.prev && sbuf->head.next);
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LIST_DEL(&sbuf->head);
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#ifdef DEBUG
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sbuf->head.next = sbuf->head.prev = NULL;
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#endif
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sbuf->needs_flush = FALSE;
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sbuf->dma.pending = FALSE;
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sbuf->hw.svga = NULL;
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sbuf->hw.boxes = NULL;
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sbuf->dma.svga = NULL;
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sbuf->dma.boxes = NULL;
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/* Decrement reference count */
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pipe_buffer_reference((struct pipe_buffer **)&sbuf, NULL);
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@ -294,7 +294,7 @@ svga_buffer_upload_flush(struct svga_context *svga,
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/**
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* Queue a DMA upload of a range of this buffer to the host.
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* Note a dirty range.
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*
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* This function only notes the range down. It doesn't actually emit a DMA
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* upload command. That only happens when a context tries to refer to this
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@ -303,19 +303,19 @@ svga_buffer_upload_flush(struct svga_context *svga,
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* We try to lump as many contiguous DMA transfers together as possible.
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*/
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static void
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svga_buffer_upload_queue(struct svga_buffer *sbuf,
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unsigned start,
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unsigned end)
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svga_buffer_add_range(struct svga_buffer *sbuf,
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unsigned start,
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unsigned end)
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{
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unsigned i;
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unsigned nearest_range;
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unsigned nearest_dist;
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assert(sbuf->hw.buf);
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assert(sbuf->hwbuf);
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assert(end > start);
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if (sbuf->hw.num_ranges < SVGA_BUFFER_MAX_RANGES) {
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nearest_range = sbuf->hw.num_ranges;
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if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
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nearest_range = sbuf->map.num_ranges;
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nearest_dist = ~0;
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} else {
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nearest_range = SVGA_BUFFER_MAX_RANGES - 1;
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@ -332,13 +332,13 @@ svga_buffer_upload_queue(struct svga_buffer *sbuf,
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* buffer should be flushed.
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*/
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for(i = 0; i < sbuf->hw.num_ranges; ++i) {
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for(i = 0; i < sbuf->map.num_ranges; ++i) {
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int left_dist;
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int right_dist;
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int dist;
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left_dist = start - sbuf->hw.ranges[i].end;
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right_dist = sbuf->hw.ranges[i].start - end;
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left_dist = start - sbuf->map.ranges[i].end;
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right_dist = sbuf->map.ranges[i].start - end;
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dist = MAX2(left_dist, right_dist);
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if (dist <= 0) {
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@ -346,8 +346,8 @@ svga_buffer_upload_queue(struct svga_buffer *sbuf,
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* Ranges are contiguous or overlapping -- extend this one and return.
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*/
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sbuf->hw.ranges[i].start = MIN2(sbuf->hw.ranges[i].start, start);
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sbuf->hw.ranges[i].end = MAX2(sbuf->hw.ranges[i].end, end);
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sbuf->map.ranges[i].start = MIN2(sbuf->map.ranges[i].start, start);
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sbuf->map.ranges[i].end = MAX2(sbuf->map.ranges[i].end, end);
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return;
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}
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else {
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@ -367,21 +367,21 @@ svga_buffer_upload_queue(struct svga_buffer *sbuf,
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* pending DMA upload and start clean.
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*/
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if(sbuf->needs_flush)
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svga_buffer_upload_flush(sbuf->hw.svga, sbuf);
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if(sbuf->dma.pending)
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svga_buffer_upload_flush(sbuf->dma.svga, sbuf);
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assert(!sbuf->needs_flush);
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assert(!sbuf->hw.svga);
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assert(!sbuf->hw.boxes);
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assert(!sbuf->dma.pending);
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assert(!sbuf->dma.svga);
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assert(!sbuf->dma.boxes);
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if (sbuf->hw.num_ranges < SVGA_BUFFER_MAX_RANGES) {
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if (sbuf->map.num_ranges < SVGA_BUFFER_MAX_RANGES) {
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/*
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* Add a new range.
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*/
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sbuf->hw.ranges[sbuf->hw.num_ranges].start = start;
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sbuf->hw.ranges[sbuf->hw.num_ranges].end = end;
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++sbuf->hw.num_ranges;
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sbuf->map.ranges[sbuf->map.num_ranges].start = start;
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sbuf->map.ranges[sbuf->map.num_ranges].end = end;
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++sbuf->map.num_ranges;
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} else {
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/*
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* Everything else failed, so just extend the nearest range.
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@ -391,9 +391,9 @@ svga_buffer_upload_queue(struct svga_buffer *sbuf,
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*/
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assert(nearest_range < SVGA_BUFFER_MAX_RANGES);
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assert(nearest_range < sbuf->hw.num_ranges);
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sbuf->hw.ranges[nearest_range].start = MIN2(sbuf->hw.ranges[nearest_range].start, start);
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sbuf->hw.ranges[nearest_range].end = MAX2(sbuf->hw.ranges[nearest_range].end, end);
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assert(nearest_range < sbuf->map.num_ranges);
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sbuf->map.ranges[nearest_range].start = MIN2(sbuf->map.ranges[nearest_range].start, start);
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sbuf->map.ranges[nearest_range].end = MAX2(sbuf->map.ranges[nearest_range].end, end);
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}
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}
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@ -409,7 +409,7 @@ svga_buffer_map_range( struct pipe_screen *screen,
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struct svga_buffer *sbuf = svga_buffer( buf );
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void *map;
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if (!sbuf->swbuf && !sbuf->hw.buf) {
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if (!sbuf->swbuf && !sbuf->hwbuf) {
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if (svga_buffer_create_hw_storage(ss, sbuf) != PIPE_OK) {
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/*
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* We can't create a hardware buffer big enough, so create a malloc
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@ -428,8 +428,8 @@ svga_buffer_map_range( struct pipe_screen *screen,
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/* User/malloc buffer */
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map = sbuf->swbuf;
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}
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else if (sbuf->hw.buf) {
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map = sws->buffer_map(sws, sbuf->hw.buf, usage);
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else if (sbuf->hwbuf) {
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map = sws->buffer_map(sws, sbuf->hwbuf, usage);
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}
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else {
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map = NULL;
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@ -465,8 +465,8 @@ svga_buffer_flush_mapped_range( struct pipe_screen *screen,
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assert(sbuf->map.writing);
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if(sbuf->map.writing) {
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assert(sbuf->map.flush_explicit);
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if(sbuf->hw.buf)
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svga_buffer_upload_queue(sbuf, offset, offset + length);
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if(sbuf->hwbuf)
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svga_buffer_add_range(sbuf, offset, offset + length);
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}
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pipe_mutex_unlock(ss->swc_mutex);
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}
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@ -485,16 +485,16 @@ svga_buffer_unmap( struct pipe_screen *screen,
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if(sbuf->map.count)
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--sbuf->map.count;
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if(sbuf->hw.buf)
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sws->buffer_unmap(sws, sbuf->hw.buf);
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if(sbuf->hwbuf)
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sws->buffer_unmap(sws, sbuf->hwbuf);
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if(sbuf->map.writing) {
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if(!sbuf->map.flush_explicit) {
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/* No mapped range was flushed -- flush the whole buffer */
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SVGA_DBG(DEBUG_DMA, "flushing the whole buffer\n");
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if(sbuf->hw.buf)
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svga_buffer_upload_queue(sbuf, 0, sbuf->base.size);
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if(sbuf->hwbuf)
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svga_buffer_add_range(sbuf, 0, sbuf->base.size);
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}
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sbuf->map.writing = FALSE;
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@ -512,12 +512,12 @@ svga_buffer_destroy( struct pipe_buffer *buf )
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assert(!p_atomic_read(&buf->reference.count));
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assert(!sbuf->needs_flush);
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assert(!sbuf->dma.pending);
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if(sbuf->handle)
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svga_buffer_destroy_host_surface(ss, sbuf);
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if(sbuf->hw.buf)
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if(sbuf->hwbuf)
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svga_buffer_destroy_hw_storage(ss, sbuf);
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if(sbuf->swbuf && !sbuf->user)
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@ -620,7 +620,7 @@ svga_screen_init_buffer_functions(struct pipe_screen *screen)
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static INLINE enum pipe_error
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svga_buffer_update_hw(struct svga_screen *ss, struct svga_buffer *sbuf)
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{
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if(!sbuf->hw.buf) {
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if(!sbuf->hwbuf) {
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enum pipe_error ret;
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void *map;
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@ -634,7 +634,7 @@ svga_buffer_update_hw(struct svga_screen *ss, struct svga_buffer *sbuf)
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return ret;
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pipe_mutex_lock(ss->swc_mutex);
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map = ss->sws->buffer_map(ss->sws, sbuf->hw.buf, PIPE_BUFFER_USAGE_CPU_WRITE);
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map = ss->sws->buffer_map(ss->sws, sbuf->hwbuf, PIPE_BUFFER_USAGE_CPU_WRITE);
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assert(map);
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if(!map) {
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pipe_mutex_unlock(ss->swc_mutex);
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@ -642,7 +642,7 @@ svga_buffer_update_hw(struct svga_screen *ss, struct svga_buffer *sbuf)
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}
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memcpy(map, sbuf->swbuf, sbuf->base.size);
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ss->sws->buffer_unmap(ss->sws, sbuf->hw.buf);
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ss->sws->buffer_unmap(ss->sws, sbuf->hwbuf);
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/* This user/malloc buffer is now indistinguishable from a gpu buffer */
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assert(!sbuf->map.count);
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@ -654,7 +654,7 @@ svga_buffer_update_hw(struct svga_screen *ss, struct svga_buffer *sbuf)
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sbuf->swbuf = NULL;
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}
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svga_buffer_upload_queue(sbuf, 0, sbuf->base.size);
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svga_buffer_add_range(sbuf, 0, sbuf->base.size);
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}
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pipe_mutex_unlock(ss->swc_mutex);
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@ -688,16 +688,16 @@ svga_buffer_handle(struct svga_context *svga,
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return NULL;
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}
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if(!sbuf->needs_flush && sbuf->hw.num_ranges) {
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if(!sbuf->dma.pending && sbuf->map.num_ranges) {
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/* Queue the buffer for flushing */
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ret = svga_buffer_upload_command(svga, sbuf);
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if(ret != PIPE_OK)
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/* XXX: Should probably have a richer return value */
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return NULL;
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assert(sbuf->hw.svga == svga);
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assert(sbuf->dma.svga == svga);
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sbuf->needs_flush = TRUE;
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sbuf->dma.pending = TRUE;
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assert(!sbuf->head.prev && !sbuf->head.next);
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LIST_ADDTAIL(&sbuf->head, &svga->dirty_buffers);
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}
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@ -757,7 +757,7 @@ svga_context_flush_buffers(struct svga_context *svga)
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sbuf = LIST_ENTRY(struct svga_buffer, curr, head);
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assert(p_atomic_read(&sbuf->base.reference.count) != 0);
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assert(sbuf->needs_flush);
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assert(sbuf->dma.pending);
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svga_buffer_upload_flush(svga, sbuf);
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@ -56,35 +56,6 @@ struct svga_buffer_range
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};
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/**
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* Describe a
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*
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* This holds the information to emit a SVGA3dCmdSurfaceDMA.
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*/
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struct svga_buffer_upload
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{
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/**
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* Guest memory region.
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*/
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struct svga_winsys_buffer *buf;
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struct svga_buffer_range ranges[SVGA_BUFFER_MAX_RANGES];
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unsigned num_ranges;
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SVGA3dSurfaceDMAFlags flags;
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/**
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* Pointer to the DMA copy box *inside* the command buffer.
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*/
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SVGA3dCopyBox *boxes;
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/**
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* Context that has the pending DMA to this buffer.
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*/
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struct svga_context *svga;
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};
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/**
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* SVGA pipe buffer.
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*/
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@ -110,14 +81,6 @@ struct svga_buffer
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|||
*/
|
||||
boolean user;
|
||||
|
||||
/**
|
||||
* DMA'ble memory.
|
||||
*
|
||||
* A piece of GMR memory. It is created when mapping the buffer, and will be
|
||||
* used to upload/download vertex data from the host.
|
||||
*/
|
||||
struct svga_buffer_upload hw;
|
||||
|
||||
/**
|
||||
* Creation key for the host surface handle.
|
||||
*
|
||||
|
|
@ -134,14 +97,81 @@ struct svga_buffer
|
|||
* trying to bind
|
||||
*/
|
||||
struct svga_winsys_surface *handle;
|
||||
|
||||
|
||||
/**
|
||||
* Information about ongoing and past map operations.
|
||||
*/
|
||||
struct {
|
||||
/**
|
||||
* Number of concurrent mappings.
|
||||
*
|
||||
* XXX: It is impossible to guarantee concurrent maps work in all
|
||||
* circumstances -- pipe_buffers really need transfer objects too.
|
||||
*/
|
||||
unsigned count;
|
||||
|
||||
/**
|
||||
* Whether this buffer is currently mapped for writing.
|
||||
*/
|
||||
boolean writing;
|
||||
|
||||
/**
|
||||
* Whether the application will tell us explicity which ranges it touched
|
||||
* or not.
|
||||
*/
|
||||
boolean flush_explicit;
|
||||
|
||||
/**
|
||||
* Dirty ranges.
|
||||
*
|
||||
* Ranges that were touched by the application and need to be uploaded to
|
||||
* the host.
|
||||
*
|
||||
* This information will be copied into dma.boxes, when emiting the
|
||||
* SVGA3dCmdSurfaceDMA command.
|
||||
*/
|
||||
struct svga_buffer_range ranges[SVGA_BUFFER_MAX_RANGES];
|
||||
unsigned num_ranges;
|
||||
} map;
|
||||
|
||||
boolean needs_flush;
|
||||
|
||||
/**
|
||||
* DMA'ble memory.
|
||||
*
|
||||
* A piece of GMR memory, with the same size of the buffer. It is created
|
||||
* when mapping the buffer, and will be used to upload vertex data to the
|
||||
* host.
|
||||
*/
|
||||
struct svga_winsys_buffer *hwbuf;
|
||||
|
||||
/**
|
||||
* Information about pending DMA uploads.
|
||||
*
|
||||
*/
|
||||
struct {
|
||||
/**
|
||||
* Whether this buffer has an unfinished DMA upload command.
|
||||
*
|
||||
* If not set then the rest of the information is null.
|
||||
*/
|
||||
boolean pending;
|
||||
|
||||
SVGA3dSurfaceDMAFlags flags;
|
||||
|
||||
/**
|
||||
* Pointer to the DMA copy box *inside* the command buffer.
|
||||
*/
|
||||
SVGA3dCopyBox *boxes;
|
||||
|
||||
/**
|
||||
* Context that has the pending DMA to this buffer.
|
||||
*/
|
||||
struct svga_context *svga;
|
||||
} dma;
|
||||
|
||||
/**
|
||||
* Linked list head, used to gather all buffers with pending dma uploads on
|
||||
* a context. It is only valid if the dma.pending is set above.
|
||||
*/
|
||||
struct list_head head;
|
||||
};
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue