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radv: Rework guard band calculation.
We want the guardband_x/y to be the largerst scalars such that each viewport scaled by that amount is still a subrange of [-32767, 32767]. The old code has a couple of issues: 1) It used scissor instead of viewport_scissor, potentially taking into account a viewport that is too small and therefore selecting a scale that is too large. 2) Merging the viewports isn't ideal, as for example viewports with boundaries [0,1] and [1000, 1001] would allow a guardband scale of ~30k, while their union [0, 1001] only allows a scale of ~32. The new code just determines the guardband per viewport and takes the minimum. Signed-off-by: Bas Nieuwenhuizen <basni@google.com> Acked-by: Dave Airlie <airlied@redhat.com>
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1 changed files with 15 additions and 40 deletions
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@ -504,22 +504,6 @@ get_viewport_xform(const VkViewport *viewport,
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translate[2] = n;
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translate[2] = n;
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}
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}
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static void
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get_viewport_xform_scissor(const VkRect2D *scissor,
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float scale[2], float translate[2])
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{
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float x = scissor->offset.x;
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float y = scissor->offset.y;
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float half_width = 0.5f * scissor->extent.width;
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float half_height = 0.5f * scissor->extent.height;
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scale[0] = half_width;
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translate[0] = half_width + x;
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scale[1] = half_height;
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translate[1] = half_height + y;
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}
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void
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void
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si_write_viewport(struct radeon_winsys_cs *cs, int first_vp,
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si_write_viewport(struct radeon_winsys_cs *cs, int first_vp,
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int count, const VkViewport *viewports)
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int count, const VkViewport *viewports)
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@ -579,26 +563,13 @@ static VkRect2D si_intersect_scissor(const VkRect2D *a, const VkRect2D *b) {
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return ret;
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return ret;
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}
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}
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static VkRect2D si_union_scissor(const VkRect2D *a, const VkRect2D *b) {
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VkRect2D ret;
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ret.offset.x = MIN2(a->offset.x, b->offset.x);
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ret.offset.y = MIN2(a->offset.y, b->offset.y);
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ret.extent.width = MAX2(a->offset.x + a->extent.width,
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b->offset.x + b->extent.width) - ret.offset.x;
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ret.extent.height = MAX2(a->offset.y + a->extent.height,
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b->offset.y + b->extent.height) - ret.offset.y;
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return ret;
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}
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void
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void
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si_write_scissors(struct radeon_winsys_cs *cs, int first,
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si_write_scissors(struct radeon_winsys_cs *cs, int first,
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int count, const VkRect2D *scissors,
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int count, const VkRect2D *scissors,
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const VkViewport *viewports, bool can_use_guardband)
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const VkViewport *viewports, bool can_use_guardband)
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{
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{
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int i;
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int i;
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VkRect2D merged;
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float scale[3], translate[3], guardband_x = INFINITY, guardband_y = INFINITY;
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float scale[2], translate[2], guardband_x = 1.0, guardband_y = 1.0;
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const float max_range = 32767.0f;
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const float max_range = 32767.0f;
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assert(count);
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assert(count);
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@ -607,10 +578,17 @@ si_write_scissors(struct radeon_winsys_cs *cs, int first,
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VkRect2D viewport_scissor = si_scissor_from_viewport(viewports + i);
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VkRect2D viewport_scissor = si_scissor_from_viewport(viewports + i);
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VkRect2D scissor = si_intersect_scissor(&scissors[i], &viewport_scissor);
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VkRect2D scissor = si_intersect_scissor(&scissors[i], &viewport_scissor);
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if (i)
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get_viewport_xform(viewports + i, scale, translate);
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merged = si_union_scissor(&merged, &scissor);
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scale[0] = abs(scale[0]);
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else
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scale[1] = abs(scale[1]);
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merged = scissor;
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if (scale[0] < 0.5)
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scale[0] = 0.5;
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if (scale[1] < 0.5)
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scale[1] = 0.5;
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guardband_x = MIN2(guardband_x, (max_range - abs(translate[0])) / scale[0]);
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guardband_y = MIN2(guardband_y, (max_range - abs(translate[1])) / scale[1]);
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radeon_emit(cs, S_028250_TL_X(scissor.offset.x) |
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radeon_emit(cs, S_028250_TL_X(scissor.offset.x) |
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S_028250_TL_Y(scissor.offset.y) |
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S_028250_TL_Y(scissor.offset.y) |
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@ -618,12 +596,9 @@ si_write_scissors(struct radeon_winsys_cs *cs, int first,
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radeon_emit(cs, S_028254_BR_X(scissor.offset.x + scissor.extent.width) |
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radeon_emit(cs, S_028254_BR_X(scissor.offset.x + scissor.extent.width) |
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S_028254_BR_Y(scissor.offset.y + scissor.extent.height));
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S_028254_BR_Y(scissor.offset.y + scissor.extent.height));
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}
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}
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if (!can_use_guardband) {
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get_viewport_xform_scissor(&merged, scale, translate);
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guardband_x = 1.0;
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guardband_y = 1.0;
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if (can_use_guardband) {
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guardband_x = (max_range - abs(translate[0])) / scale[0];
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guardband_y = (max_range - abs(translate[1])) / scale[1];
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}
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}
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radeon_set_context_reg_seq(cs, R_028BE8_PA_CL_GB_VERT_CLIP_ADJ, 4);
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radeon_set_context_reg_seq(cs, R_028BE8_PA_CL_GB_VERT_CLIP_ADJ, 4);
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