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elk: use the new lower_txd_cb

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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37692>
This commit is contained in:
Lionel Landwerlin 2025-09-21 16:06:21 +03:00 • committed by Marge Bot
parent a14fee571b
commit a49cf90e14
1 changed files with 38 additions and 7 deletions
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45
src/intel/compiler/elk/elk_nir.c
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@ -950,6 +950,43 @@ lower_xehp_tg4_offset_filter(const nir_instr *instr, UNUSED const void *data)
return offset_x < -8 || offset_x > 7 || offset_y < -8 || offset_y > 7;
}
static bool
lower_txd_cb(const nir_tex_instr *tex, const void *data)
{
const struct intel_device_info *devinfo = data;
/* Prior to Haswell, we have to lower gradients on shadow samplers */
if (devinfo->verx10 <= 70 && tex->is_shadow)
return true;
/* sample_d_c messages don't have a LOD/MLOD parameter */
int min_lod_index = nir_tex_instr_src_index(tex, nir_tex_src_min_lod);
if (tex->is_shadow && min_lod_index >= 0)
return true;
int offset_index = nir_tex_instr_src_index(tex, nir_tex_src_offset);
if (offset_index >= 0 && min_lod_index >= 0)
return true;
/* Cases that require a sampler header and the payload is already too large
* for the HW to handle.
*/
const int sampler_offset_idx =
nir_tex_instr_src_index(tex, nir_tex_src_sampler_offset);
if (min_lod_index >= 0 && sampler_offset_idx >= 0) {
if (!nir_src_is_const(tex->src[sampler_offset_idx].src) ||
(nir_src_is_const(tex->src[sampler_offset_idx].src) &&
(tex->sampler_index +
nir_src_as_uint(tex->src[sampler_offset_idx].src)) >= 16))
return true;
}
if (tex->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
return true;
return false;
}
/* Does some simple lowering and runs the standard suite of optimizations
*
* This is intended to be called more-or-less directly after you get the
@ -993,13 +1030,11 @@ elk_preprocess_nir(const struct elk_compiler *compiler, nir_shader *nir,
.lower_txp = ~0,
.lower_txf_offset = true,
.lower_rect_offset = true,
.lower_txd_cube_map = true,
.lower_txb_shadow_clamp = true,
.lower_txd_shadow_clamp = true,
.lower_txd_offset_clamp = true,
.lower_tg4_offsets = true,
.lower_txs_lod = true, /* Wa_14012320009 */
.lower_invalid_implicit_lod = true,
.lower_txd_cb = lower_txd_cb,
};
OPT(nir_lower_tex, &tex_options);
@ -1646,7 +1681,6 @@ elk_nir_apply_sampler_key(nir_shader *nir,
{
const struct intel_device_info *devinfo = compiler->devinfo;
nir_lower_tex_options tex_options = {
.lower_txd_clamp_if_sampler_index_not_lt_16 = true,
.lower_invalid_implicit_lod = true,
.lower_index_to_offset = true,
};
@ -1662,9 +1696,6 @@ elk_nir_apply_sampler_key(nir_shader *nir,
tex_options.saturate_r = key_tex->gl_clamp_mask[2];
}
/* Prior to Haswell, we have to lower gradients on shadow samplers */
tex_options.lower_txd_shadow = devinfo->verx10 <= 70;
return nir_lower_tex(nir, &tex_options);
}