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i965: Fix CS scratch size calculations on Ivybridge and Baytrail.

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These are linear, not powers of two, and much more limited.

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Kenneth Graunke 2016-06-09 17:30:40 -07:00
parent 147a90d82a
commit a42a93dc12
2 changed files with 10 additions and 2 deletions
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6
src/mesa/drivers/dri/i965/brw_fs.cpp
View file

@ -5995,6 +5995,12 @@ fs_visitor::allocate_registers(bool allow_spilling)
* and platform.
*/
prog_data->total_scratch = MAX2(prog_data->total_scratch, 2048);
} else if (devinfo->gen <= 7 && stage == MESA_SHADER_COMPUTE) {
/* According to the MEDIAVFE_STATE's "Per Thread Scratch Space"
* field documentation, platforms prior to Haswell measure scratch
* size linearly with a range of [1kB, 12kB] and 1kB granularity.
*/
prog_data->total_scratch = ALIGN(last_scratch, 1024);
}
}
}

6
src/mesa/drivers/dri/i965/gen7_cs_state.c
View file

@ -79,10 +79,12 @@ brw_upload_cs_state(struct brw_context *brw)
I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
ffs(prog_data->total_scratch) - 12);
} else {
/* This is wrong but we'll fix it later */
/* Earlier platforms use the range [0, 11] to mean [1kB, 12kB]
* where 0 = 1kB, 1 = 2kB, 2 = 3kB, ..., 11 = 12kB.
*/
OUT_RELOC(stage_state->scratch_bo,
I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
ffs(prog_data->total_scratch) - 11);
prog_data->total_scratch / 1024 - 1);
}
} else {
OUT_BATCH(0);