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nouveau: remove automatic buffer migration heuristics
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parent
66c7dc5688
commit
a3fee8fc86
4 changed files with 0 additions and 36 deletions
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@ -200,9 +200,6 @@ nouveau_buffer_transfer_destroy(struct pipe_context *pipe,
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struct nouveau_context *nv = nouveau_context(pipe);
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if (xfr->base.usage & PIPE_TRANSFER_WRITE) {
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/* writing is worse */
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nouveau_buffer_adjust_score(nv, buf, -5000);
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if (buf->domain == NOUVEAU_BO_VRAM) {
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nouveau_buffer_upload(nv, buf, transfer->box.x, transfer->box.width);
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}
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@ -257,8 +254,6 @@ nouveau_buffer_transfer_map(struct pipe_context *pipe,
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uint32_t offset = xfr->base.box.x;
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uint32_t flags;
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nouveau_buffer_adjust_score(nouveau_context(pipe), buf, -250);
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if (buf->domain != NOUVEAU_BO_GART)
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return buf->data + offset;
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@ -8,10 +8,6 @@ struct pipe_resource;
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struct nouveau_context;
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struct nouveau_bo;
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#define NOUVEAU_BUFFER_SCORE_MIN -25000
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#define NOUVEAU_BUFFER_SCORE_MAX 25000
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#define NOUVEAU_BUFFER_SCORE_VRAM_THRESHOLD 20000
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/* DIRTY: buffer was (or will be after the next flush) written to by GPU and
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* resource->data has not been updated to reflect modified VRAM contents
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*
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@ -39,8 +35,6 @@ struct nv04_resource {
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uint8_t status;
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uint8_t domain;
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int16_t score; /* low if mapped very often, if high can move to VRAM */
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struct nouveau_fence *fence;
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struct nouveau_fence *fence_wr;
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@ -58,23 +52,6 @@ boolean
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nouveau_buffer_migrate(struct nouveau_context *,
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struct nv04_resource *, unsigned domain);
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static INLINE void
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nouveau_buffer_adjust_score(struct nouveau_context *pipe,
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struct nv04_resource *res, int16_t score)
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{
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if (score < 0) {
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if (res->score > NOUVEAU_BUFFER_SCORE_MIN)
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res->score += score;
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} else
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if (score > 0){
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if (res->score < NOUVEAU_BUFFER_SCORE_MAX)
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res->score += score;
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if (res->domain == NOUVEAU_BO_GART &&
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res->score > NOUVEAU_BUFFER_SCORE_VRAM_THRESHOLD)
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nouveau_buffer_migrate(pipe, res, NOUVEAU_BO_VRAM);
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}
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}
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/* XXX: wait for fence (atm only using this for vertex push) */
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static INLINE void *
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nouveau_resource_map_offset(struct nouveau_context *pipe,
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@ -83,8 +60,6 @@ nouveau_resource_map_offset(struct nouveau_context *pipe,
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{
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void *map;
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nouveau_buffer_adjust_score(pipe, res, -250);
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if ((res->domain == NOUVEAU_BO_VRAM) &&
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(res->status & NOUVEAU_BUFFER_STATUS_GPU_WRITING))
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nouveau_buffer_download(pipe, res, 0, res->base.width0);
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@ -219,7 +219,6 @@ nv50_prevalidate_vbufs(struct nv50_context *nv50)
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}
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}
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nv50_bufctx_add_resident(nv50, NV50_BUFCTX_VERTEX, buf, NOUVEAU_BO_RD);
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nouveau_buffer_adjust_score(&nv50->base, buf, 1);
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}
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}
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@ -541,8 +540,6 @@ nv50_draw_elements(struct nv50_context *nv50, boolean shorten,
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start += nv50->idxbuf.offset >> (index_size >> 1);
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nouveau_buffer_adjust_score(&nv50->base, res, 1);
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while (instance_count--) {
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BEGIN_RING(chan, RING_3D(VERTEX_BEGIN_GL), 1);
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OUT_RING (chan, mode);
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@ -197,7 +197,6 @@ nvc0_prevalidate_vbufs(struct nvc0_context *nvc0)
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}
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}
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nvc0_bufctx_add_resident(nvc0, NVC0_BUFCTX_VERTEX, buf, NOUVEAU_BO_RD);
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nouveau_buffer_adjust_score(&nvc0->base, buf, 1);
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}
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}
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@ -516,8 +515,6 @@ nvc0_draw_elements(struct nvc0_context *nvc0, boolean shorten,
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unsigned offset = nvc0->idxbuf.offset;
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unsigned limit = nvc0->idxbuf.buffer->width0 - 1;
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nouveau_buffer_adjust_score(&nvc0->base, res, 1);
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while (instance_count--) {
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MARK_RING (chan, 11, 4);
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BEGIN_RING(chan, RING_3D(VERTEX_BEGIN_GL), 1);
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