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radv: Add create image flag to not use DCC/CMASK.

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If we import an image, we might not have space in the
buffer for CMASK, even though it is compatible.

Reviewed-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Bas Nieuwenhuizen 2018-01-04 18:38:31 +01:00 • committed by Bas Nieuwenhuizen
parent e344cd8178
commit a3e241ed07
2 changed files with 27 additions and 21 deletions
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47
src/amd/vulkan/radv_image.c
View file

@ -923,29 +923,34 @@ radv_image_create(VkDevice _device,
image->size = image->surface.surf_size;
image->alignment = image->surface.surf_alignment;
/* Try to enable DCC first. */
if (radv_image_can_enable_dcc(image)) {
radv_image_alloc_dcc(image);
} else {
/* When DCC cannot be enabled, try CMASK. */
image->surface.dcc_size = 0;
if (radv_image_can_enable_cmask(image)) {
radv_image_alloc_cmask(device, image);
}
}
/* Try to enable FMASK for multisampled images. */
if (radv_image_can_enable_fmask(image)) {
radv_image_alloc_fmask(device, image);
} else {
/* Otherwise, try to enable HTILE for depth surfaces. */
if (radv_image_can_enable_htile(image) &&
!(device->instance->debug_flags & RADV_DEBUG_NO_HIZ)) {
radv_image_alloc_htile(image);
image->tc_compatible_htile = image->surface.flags & RADEON_SURF_TC_COMPATIBLE_HTILE;
if (!create_info->no_metadata_planes) {
/* Try to enable DCC first. */
if (radv_image_can_enable_dcc(image)) {
radv_image_alloc_dcc(image);
} else {
image->surface.htile_size = 0;
/* When DCC cannot be enabled, try CMASK. */
image->surface.dcc_size = 0;
if (radv_image_can_enable_cmask(image)) {
radv_image_alloc_cmask(device, image);
}
}
/* Try to enable FMASK for multisampled images. */
if (radv_image_can_enable_fmask(image)) {
radv_image_alloc_fmask(device, image);
} else {
/* Otherwise, try to enable HTILE for depth surfaces. */
if (radv_image_can_enable_htile(image) &&
!(device->instance->debug_flags & RADV_DEBUG_NO_HIZ)) {
radv_image_alloc_htile(image);
image->tc_compatible_htile = image->surface.flags & RADEON_SURF_TC_COMPATIBLE_HTILE;
} else {
image->surface.htile_size = 0;
}
}
} else {
image->surface.dcc_size = 0;
image->surface.htile_size = 0;
}
if (pCreateInfo->flags & VK_IMAGE_CREATE_SPARSE_BINDING_BIT) {

1
src/amd/vulkan/radv_private.h
View file

@ -1460,6 +1460,7 @@ struct radv_image_view {
struct radv_image_create_info {
const VkImageCreateInfo *vk_info;
bool scanout;
bool no_metadata_planes;
};
VkResult radv_image_create(VkDevice _device,