From a34a8fc0cde7b237c93e7c1d666cad6c54fb1e0f Mon Sep 17 00:00:00 2001 From: Karol Herbst Date: Tue, 3 Sep 2024 09:13:00 +0200 Subject: [PATCH] iris: implement resource_get_address MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Acked-by: Adam Jackson Reviewed-by: José Roberto de Souza Part-of: --- docs/features.txt | 2 +- docs/relnotes/new_features.txt | 2 +- src/gallium/drivers/iris/iris_resource.c | 13 ++++++++++++- src/gallium/drivers/iris/iris_state.c | 12 ++++++++++-- 4 files changed, 24 insertions(+), 5 deletions(-) diff --git a/docs/features.txt b/docs/features.txt index 006eb1fc8db..b03dadb670a 100644 --- a/docs/features.txt +++ b/docs/features.txt @@ -849,7 +849,7 @@ Rusticl extensions that are not part of any OpenCL version: cl_khr_terminate_context not started cl_khr_throttle_hints not started cl_khr_work_group_uniform_arithmetic not started - cl_ext_buffer_device_address DONE (llvmpipe, zink) + cl_ext_buffer_device_address DONE (iris, llvmpipe, zink) cl_arm_non_uniform_work_group_size not started cl_arm_shared_virtual_memory in progress (nvc0) cl_intel_subgroups in progress (available with RUSTICL_FEATURES=intel) diff --git a/docs/relnotes/new_features.txt b/docs/relnotes/new_features.txt index 5abfe268de3..73ecf0a68ed 100644 --- a/docs/relnotes/new_features.txt +++ b/docs/relnotes/new_features.txt @@ -27,7 +27,7 @@ VK_EXT_image_2d_view_of_3d on panvk VK_EXT_texel_buffer_alignment on panvk cl_khr_kernel_clock on freedreno, iris, llvmpipe, nvc0, panfrost, radeonsi and zink with llvm-19 or newer GL_KHR_texture_compression_astc_hdr on panfrost and asahi -cl_ext_buffer_device_address on llvmpipe and zink +cl_ext_buffer_device_address on iris, llvmpipe and zink Completed OpenCL 2.0 coarse grain buffer SVM support VK_EXT_shader_subgroup_ballot on panvk VK_EXT_shader_subgroup_vote on panvk diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c index 54300498bc3..1493c58a917 100644 --- a/src/gallium/drivers/iris/iris_resource.c +++ b/src/gallium/drivers/iris/iris_resource.c @@ -1976,7 +1976,8 @@ iris_invalidate_buffer(struct iris_context *ice, struct iris_resource *res) { struct iris_screen *screen = (void *) ice->ctx.screen; - if (res->base.b.target != PIPE_BUFFER) + if (res->base.b.target != PIPE_BUFFER || + res->base.b.flags & PIPE_RESOURCE_FLAG_FIXED_ADDRESS) return false; /* If it's already invalidated, don't bother doing anything. @@ -2736,6 +2737,15 @@ static const struct u_transfer_vtbl transfer_vtbl = { .get_stencil = iris_resource_get_separate_stencil, }; +static uint64_t +iris_resource_get_address(struct pipe_screen *pscreen, + struct pipe_resource *presrouce) +{ + struct iris_resource *res = (struct iris_resource *)presrouce; + assert(presrouce->flags & PIPE_RESOURCE_FLAG_FIXED_ADDRESS); + return res->bo->address + res->offset; +} + void iris_init_screen_resource_functions(struct pipe_screen *pscreen) { @@ -2753,6 +2763,7 @@ iris_init_screen_resource_functions(struct pipe_screen *pscreen) pscreen->resource_destroy = u_transfer_helper_resource_destroy; pscreen->memobj_create_from_handle = iris_memobj_create_from_handle; pscreen->memobj_destroy = iris_memobj_destroy; + pscreen->resource_get_address = iris_resource_get_address; pscreen->transfer_helper = u_transfer_helper_create(&transfer_vtbl, U_TRANSFER_HELPER_SEPARATE_Z32S8 | diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 77d9ac16b54..d201b10a89e 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -9338,7 +9338,8 @@ iris_upload_gpgpu_walker(struct iris_context *ice, static void iris_use_global_bindings(struct iris_context *ice, - struct iris_batch *batch) + struct iris_batch *batch, + const struct pipe_grid_info *grid) { for (unsigned i = 0; i < IRIS_MAX_GLOBAL_BINDINGS; i++) { struct pipe_resource *res = ice->state.global_bindings[i]; @@ -9348,6 +9349,13 @@ iris_use_global_bindings(struct iris_context *ice, iris_use_pinned_bo(batch, iris_resource_bo(res), true, IRIS_DOMAIN_NONE); } + + for (unsigned i = 0; i < grid->num_globals; i++) { + struct iris_resource *res = (void *) grid->globals[i]; + iris_use_pinned_bo(batch, res->bo, true, IRIS_DOMAIN_NONE); + util_range_add(&res->base.b, &res->valid_buffer_range, + 0, res->base.b.width0); + } } static void @@ -9391,7 +9399,7 @@ iris_upload_compute_state(struct iris_context *ice, iris_use_pinned_bo(batch, border_color_pool->bo, false, IRIS_DOMAIN_NONE); - iris_use_global_bindings(ice, batch); + iris_use_global_bindings(ice, batch, grid); #if GFX_VER >= 12 genX(invalidate_aux_map_state)(batch);