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radv: use nir_lower_fp16_casts

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This correctly implements RTNE f64->f16.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25566>
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Rhys Perry 2023-10-04 14:33:58 +01:00 • committed by Marge Bot
parent 0e1e6c244b
commit a31c928c4f
1 changed files with 2 additions and 0 deletions
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2
src/amd/vulkan/radv_pipeline.c
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@ -735,6 +735,8 @@ radv_postprocess_nir(struct radv_device *device, const struct radv_pipeline_key
radv_optimize_nir_algebraic(
stage->nir, io_to_mem || lowered_ngg || stage->stage == MESA_SHADER_COMPUTE || stage->stage == MESA_SHADER_TASK);
NIR_PASS(_, stage->nir, nir_lower_fp16_casts, nir_lower_fp16_split_fp64);
if (stage->nir->info.bit_sizes_int & (8 | 16)) {
if (gfx_level >= GFX8) {
NIR_PASS(_, stage->nir, nir_convert_to_lcssa, true, true);