ac,radv: add ac_gpu_info::has_double_rate_fp16

Only GFX9+ support double rate packed math instructions.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4453>
This commit is contained in:
Samuel Pitoiset 2020-04-05 09:23:16 +02:00
parent 420ca1e4a1
commit a3113e07b9
3 changed files with 6 additions and 2 deletions

View file

@ -590,6 +590,9 @@ bool ac_query_gpu_info(int fd, void *dev_p,
info->has_out_of_order_rast = info->chip_class >= GFX8 &&
info->max_se >= 2;
/* Whether chips support double rate packed math instructions. */
info->has_double_rate_fp16 = info->chip_class >= GFX9;
/* TODO: Figure out how to use LOAD_CONTEXT_REG on GFX6-GFX7. */
info->has_load_ctx_reg_pkt = info->chip_class >= GFX9 ||
(info->chip_class >= GFX8 &&

View file

@ -66,6 +66,7 @@ struct radeon_info {
bool rbplus_allowed; /* if RB+ is allowed */
bool has_load_ctx_reg_pkt;
bool has_out_of_order_rast;
bool has_double_rate_fp16;
bool cpdma_prefetch_writes_memory;
bool has_gfx9_scissor_bug;
bool has_tc_compat_zrange_bug;

View file

@ -155,8 +155,8 @@ EXTENSIONS = [
Extension('VK_AMD_device_coherent_memory', 1, True),
Extension('VK_AMD_draw_indirect_count', 1, True),
Extension('VK_AMD_gcn_shader', 1, True),
Extension('VK_AMD_gpu_shader_half_float', 1, '!device->use_aco && device->rad_info.chip_class >= GFX9'),
Extension('VK_AMD_gpu_shader_int16', 1, '!device->use_aco && device->rad_info.chip_class >= GFX9'),
Extension('VK_AMD_gpu_shader_half_float', 1, '!device->use_aco && device->rad_info.has_double_rate_fp16'),
Extension('VK_AMD_gpu_shader_int16', 1, '!device->use_aco && device->rad_info.has_double_rate_fp16'),
# Disable mixed attachment samples on GFX6-GFX7 until the CTS failures have been resolved.
Extension('VK_AMD_mixed_attachment_samples', 1, 'device->rad_info.chip_class >= GFX8'),
Extension('VK_AMD_rasterization_order', 1, 'device->rad_info.has_out_of_order_rast'),