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gallium: Change PIPE_CAP_TGSI_FS_FBFETCH bool to PIPE_CAP_FBFETCH count

Browse source 
TGSI's FBFETCH instruction currently only supports reading from a single
render target, but NIR intrinsics can support multiple render targets.

radeonsi can only support fetching from RT 0, but other drivers may be
able to support fetching from any render target.

To express this, this patch renames PIPE_CAP_TGSI_FS_FBFETCH to simply
PIPE_CAP_FBFETCH, and converts it from a boolean "is FBFETCH supported?"
to an integer number of render targets which can be fetched.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Kenneth Graunke 2019-05-14 20:23:36 -07:00
parent 7d2b54e393
commit a2d7834457
20 changed files with 32 additions and 24 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/gallium/auxiliary/util/u_screen.c
View file

@ -270,7 +270,7 @@ u_pipe_screen_get_param_defaults(struct pipe_screen *pscreen,
case PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS:
return 0;
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_FBFETCH:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_DOUBLES:
case PIPE_CAP_INT64:

2
src/gallium/auxiliary/util/u_tests.c
View file

@ -631,7 +631,7 @@ test_texture_barrier(struct pipe_context *ctx, bool use_fbfetch,
return;
}
if (use_fbfetch &&
!ctx->screen->get_param(ctx->screen, PIPE_CAP_TGSI_FS_FBFETCH)) {
!ctx->screen->get_param(ctx->screen, PIPE_CAP_FBFETCH)) {
util_report_result_helper(SKIP, name);
return;
}

6
src/gallium/docs/source/screen.rst
View file

@ -378,8 +378,10 @@ The integer capabilities:
* ``PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY``: Tell the GLSL compiler to use
the minimum amount of optimizations just to be able to do all the linking
and lowering.
* ``PIPE_CAP_TGSI_FS_FBFETCH``: Whether a fragment shader can use the FBFETCH
opcode to retrieve the current value in the framebuffer.
* ``PIPE_CAP_FBFETCH``: The number of render targets whose value in the
current framebuffer can be read in the shader. 0 means framebuffer fetch
is not supported. 1 means that only the first render target can be read,
and a larger value would mean that multiple render targets are supported.
* ``PIPE_CAP_TGSI_MUL_ZERO_WINS``: Whether TGSI shaders support the
``TGSI_PROPERTY_MUL_ZERO_WINS`` shader property.
* ``PIPE_CAP_DOUBLES``: Whether double precision floating-point operations

2
src/gallium/drivers/etnaviv/etnaviv_screen.c
View file

@ -255,7 +255,7 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_FBFETCH:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_DOUBLES:
case PIPE_CAP_INT64:

2
src/gallium/drivers/freedreno/freedreno_screen.c
View file

@ -307,7 +307,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
return 0;
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_FBFETCH:
if (fd_device_version(screen->dev) >= FD_VERSION_GMEM_BASE &&
is_a6xx(screen))
return 1;

2
src/gallium/drivers/i915/i915_screen.c
View file

@ -312,7 +312,7 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
case PIPE_CAP_NATIVE_FENCE_FD:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_FBFETCH:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_DOUBLES:
case PIPE_CAP_INT64:

3
src/gallium/drivers/iris/iris_screen.c
View file

@ -192,8 +192,9 @@ iris_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_INVALIDATE_BUFFER:
case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
return true;
case PIPE_CAP_FBFETCH:
return devinfo->gen >= 9 ? BRW_MAX_DRAW_BUFFERS : 0;
case PIPE_CAP_CONSERVATIVE_RASTER_INNER_COVERAGE:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_POST_DEPTH_COVERAGE:
case PIPE_CAP_SHADER_STENCIL_EXPORT:
case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:

2
src/gallium/drivers/llvmpipe/lp_screen.c
View file

@ -348,7 +348,7 @@ llvmpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
case PIPE_CAP_NATIVE_FENCE_FD:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_FBFETCH:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_TGSI_CLOCK:
case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:

2
src/gallium/drivers/nouveau/nv30/nv30_screen.c
View file

@ -212,7 +212,7 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
case PIPE_CAP_NATIVE_FENCE_FD:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_FBFETCH:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_DOUBLES:
case PIPE_CAP_INT64:

2
src/gallium/drivers/nouveau/nv50/nv50_screen.c
View file

@ -278,7 +278,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
case PIPE_CAP_NATIVE_FENCE_FD:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_FBFETCH:
case PIPE_CAP_DOUBLES:
case PIPE_CAP_INT64:
case PIPE_CAP_INT64_DIVMOD:

4
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
View file

@ -280,8 +280,8 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
return 1;
case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
return nouveau_screen(pscreen)->vram_domain & NOUVEAU_BO_VRAM ? 1 : 0;
case PIPE_CAP_TGSI_FS_FBFETCH:
return class_3d >= NVE4_3D_CLASS; /* needs testing on fermi */
case PIPE_CAP_FBFETCH:
return class_3d >= NVE4_3D_CLASS ? 1 : 0; /* needs testing on fermi */
case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
case PIPE_CAP_TGSI_BALLOT:
return class_3d >= NVE4_3D_CLASS;

2
src/gallium/drivers/r300/r300_screen.c
View file

@ -229,7 +229,7 @@ static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
case PIPE_CAP_NATIVE_FENCE_FD:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_FBFETCH:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_DOUBLES:
case PIPE_CAP_INT64:

2
src/gallium/drivers/r600/r600_pipe.c
View file

@ -423,7 +423,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
case PIPE_CAP_NATIVE_FENCE_FD:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_FBFETCH:
case PIPE_CAP_INT64:
case PIPE_CAP_INT64_DIVMOD:
case PIPE_CAP_TGSI_TEX_TXF_LZ:

2
src/gallium/drivers/radeonsi/si_get.c
View file

@ -152,7 +152,7 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_TGSI_BALLOT:
case PIPE_CAP_TGSI_VOTE:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_FBFETCH:
case PIPE_CAP_COMPUTE_GRID_INFO_LAST_BLOCK:
case PIPE_CAP_IMAGE_LOAD_FORMATTED:
case PIPE_CAP_PREFER_COMPUTE_BLIT_FOR_MULTIMEDIA:

2
src/gallium/drivers/softpipe/sp_screen.c
View file

@ -305,7 +305,7 @@ softpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
case PIPE_CAP_NATIVE_FENCE_FD:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_FBFETCH:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_TGSI_CLOCK:
case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:

2
src/gallium/drivers/svga/svga_screen.c
View file

@ -448,7 +448,7 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_FBFETCH:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_DOUBLES:
case PIPE_CAP_INT64:

2
src/gallium/drivers/swr/swr_screen.cpp
View file

@ -331,7 +331,7 @@ swr_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
case PIPE_CAP_NATIVE_FENCE_FD:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_FBFETCH:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_INT64:
case PIPE_CAP_INT64_DIVMOD:

5
src/gallium/drivers/virgl/virgl_screen.c
View file

@ -246,8 +246,9 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FB_NO_ATTACH;
case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_ROBUST_BUFFER_ACCESS;
case PIPE_CAP_TGSI_FS_FBFETCH:
return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_FBFETCH;
case PIPE_CAP_FBFETCH:
return (vscreen->caps.caps.v2.capability_bits &
VIRGL_CAP_TGSI_FBFETCH) ? 1 : 0;
case PIPE_CAP_TGSI_CLOCK:
return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SHADER_CLOCK;
case PIPE_CAP_TGSI_ARRAY_COMPONENTS:

2
src/gallium/include/pipe/p_defines.h
View file

@ -825,7 +825,7 @@ enum pipe_cap
PIPE_CAP_NATIVE_FENCE_FD,
PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY,
PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS,
PIPE_CAP_TGSI_FS_FBFETCH,
PIPE_CAP_FBFETCH,
PIPE_CAP_TGSI_MUL_ZERO_WINS,
PIPE_CAP_DOUBLES,
PIPE_CAP_INT64,

8
src/mesa/state_tracker/st_extensions.c
View file

@ -747,8 +747,6 @@ void st_init_extensions(struct pipe_screen *screen,
{ o(ARB_transform_feedback_overflow_query), PIPE_CAP_QUERY_SO_OVERFLOW },
{ o(ARB_fragment_shader_interlock), PIPE_CAP_FRAGMENT_SHADER_INTERLOCK },
{ o(KHR_blend_equation_advanced), PIPE_CAP_TGSI_FS_FBFETCH },
{ o(EXT_blend_equation_separate), PIPE_CAP_BLEND_EQUATION_SEPARATE },
{ o(EXT_depth_bounds_test), PIPE_CAP_DEPTH_BOUNDS_TEST },
{ o(EXT_disjoint_timer_query), PIPE_CAP_QUERY_TIMESTAMP },
@ -1396,6 +1394,12 @@ void st_init_extensions(struct pipe_screen *screen,
consts->DisableVaryingPacking = GL_TRUE;
}
unsigned max_fb_fetch_rts = screen->get_param(screen, PIPE_CAP_FBFETCH);
if (max_fb_fetch_rts > 0) {
extensions->KHR_blend_equation_advanced = true;
}
consts->MaxViewports = screen->get_param(screen, PIPE_CAP_MAX_VIEWPORTS);
if (consts->MaxViewports >= 16) {
if (GLSLVersion >= 400) {