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i965g: convert read/write domain pairs into single usage value

Browse source 
Easier to understand what's going on in the driver sources, convert
stereotype usage values back to GEM read/write domain flags in the
winsys.
This commit is contained in:
Keith Whitwell 2009-11-03 23:16:02 +00:00
parent 4ea94c04c9
commit a277bb20de
18 changed files with 104 additions and 76 deletions
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9
src/gallium/drivers/i965/brw_batchbuffer.c
View file

@ -168,9 +168,9 @@ _brw_batchbuffer_flush(struct brw_batchbuffer *batch,
*/
enum pipe_error
brw_batchbuffer_emit_reloc(struct brw_batchbuffer *batch,
struct brw_winsys_buffer *buffer,
uint32_t read_domains, uint32_t write_domain,
uint32_t delta)
struct brw_winsys_buffer *buffer,
uint32_t usage,
uint32_t delta)
{
int ret;
@ -182,8 +182,7 @@ brw_batchbuffer_emit_reloc(struct brw_batchbuffer *batch,
}
ret = batch->sws->bo_emit_reloc(batch->buf,
read_domains,
write_domain,
usage,
delta,
batch->ptr - batch->map,
buffer);

7
src/gallium/drivers/i965/brw_batchbuffer.h
View file

@ -77,8 +77,7 @@ int brw_batchbuffer_data(struct brw_batchbuffer *batch,
int brw_batchbuffer_emit_reloc(struct brw_batchbuffer *batch,
struct brw_winsys_buffer *buffer,
uint32_t read_domains,
uint32_t write_domain,
enum brw_buffer_usage usage,
uint32_t offset);
/* Inline functions - might actually be better off with these
@ -125,10 +124,10 @@ brw_batchbuffer_require_space(struct brw_batchbuffer *batch,
#define OUT_BATCH(d) brw_batchbuffer_emit_dword(brw->batch, d)
#define OUT_RELOC(buf, read_domains, write_domain, delta) do { \
#define OUT_RELOC(buf, usage, delta) do { \
assert((unsigned) (delta) < buf->size); \
brw_batchbuffer_emit_reloc(brw->batch, buf, \
read_domains, write_domain, delta); \
usage, delta); \
} while (0)
#ifdef DEBUG

2
src/gallium/drivers/i965/brw_cc.c
View file

@ -151,7 +151,7 @@ cc_unit_create_from_key(struct brw_context *brw, struct brw_cc_unit_key *key)
/* Emit CC viewport relocation */
brw->sws->bo_emit_reloc(bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
BRW_USAGE_STATE,
0,
offsetof(struct brw_cc_unit_state, cc4),
brw->cc.vp_bo);

2
src/gallium/drivers/i965/brw_clip_state.c
View file

@ -150,7 +150,7 @@ clip_unit_create_from_key(struct brw_context *brw,
/* Emit clip program relocation */
assert(brw->clip.prog_bo);
brw->sws->bo_emit_reloc(bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
BRW_USAGE_STATE,
clip.thread0.grf_reg_count << 1,
offsetof(struct brw_clip_unit_state, thread0),
brw->clip.prog_bo);

2
src/gallium/drivers/i965/brw_curbe.c
View file

@ -323,7 +323,7 @@ static int emit_curbe_buffer(struct brw_context *brw)
} else {
OUT_BATCH((CMD_CONST_BUFFER << 16) | (1 << 8) | (2 - 2));
OUT_RELOC(brw->curbe.curbe_bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
BRW_USAGE_STATE,
(sz - 1) + brw->curbe.curbe_offset);
}
ADVANCE_BATCH();

8
src/gallium/drivers/i965/brw_draw_upload.c
View file

@ -300,11 +300,11 @@ static int brw_emit_vertex_buffers( struct brw_context *brw )
BRW_VB0_ACCESS_VERTEXDATA |
(brw->vb.vb[i].stride << BRW_VB0_PITCH_SHIFT));
OUT_RELOC(brw->vb.vb[i].bo,
I915_GEM_DOMAIN_VERTEX, 0,
BRW_USAGE_VERTEX,
brw->vb.vb[i].offset);
if (BRW_IS_IGDNG(brw)) {
OUT_RELOC(brw->vb.vb[i].bo,
I915_GEM_DOMAIN_VERTEX, 0,
BRW_USAGE_VERTEX,
brw->vb.vb[i].bo->size - 1);
} else
OUT_BATCH(brw->vb.vb[i].stride ? brw->vb.vb[i].vertex_count : 0);
@ -527,10 +527,10 @@ static int brw_emit_index_buffer(struct brw_context *brw)
BEGIN_BATCH(4, IGNORE_CLIPRECTS);
OUT_BATCH( ib.header.dword );
OUT_RELOC(brw->ib.bo,
I915_GEM_DOMAIN_VERTEX, 0,
BRW_USAGE_VERTEX,
brw->ib.offset);
OUT_RELOC(brw->ib.bo,
I915_GEM_DOMAIN_VERTEX, 0,
BRW_USAGE_VERTEX,
brw->ib.offset + brw->ib.size - 1);
OUT_BATCH( 0 );
ADVANCE_BATCH();

2
src/gallium/drivers/i965/brw_gs_state.c
View file

@ -113,7 +113,7 @@ gs_unit_create_from_key(struct brw_context *brw, struct brw_gs_unit_key *key)
if (key->prog_active) {
/* Emit GS program relocation */
brw->sws->bo_emit_reloc(bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
BRW_USAGE_STATE,
gs.thread0.grf_reg_count << 1,
offsetof(struct brw_gs_unit_state, thread0),
brw->gs.prog_bo);

18
src/gallium/drivers/i965/brw_misc_state.c
View file

@ -111,7 +111,7 @@ static int upload_binding_table_pointers(struct brw_context *brw)
OUT_BATCH(CMD_BINDING_TABLE_PTRS << 16 | (6 - 2));
if (brw->vs.bind_bo != NULL)
OUT_RELOC(brw->vs.bind_bo,
I915_GEM_DOMAIN_SAMPLER, 0,
BRW_USAGE_SAMPLER,
0); /* vs */
else
OUT_BATCH(0);
@ -119,7 +119,7 @@ static int upload_binding_table_pointers(struct brw_context *brw)
OUT_BATCH(0); /* clip */
OUT_BATCH(0); /* sf */
OUT_RELOC(brw->wm.bind_bo,
I915_GEM_DOMAIN_SAMPLER, 0,
BRW_USAGE_SAMPLER,
0); /* wm/ps */
ADVANCE_BATCH();
return 0;
@ -147,25 +147,25 @@ static int upload_pipelined_state_pointers(struct brw_context *brw )
BEGIN_BATCH(7, IGNORE_CLIPRECTS);
OUT_BATCH(CMD_PIPELINED_STATE_POINTERS << 16 | (7 - 2));
OUT_RELOC(brw->vs.state_bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
BRW_USAGE_STATE,
0);
if (brw->gs.prog_active)
OUT_RELOC(brw->gs.state_bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
BRW_USAGE_STATE,
1);
else
OUT_BATCH(0);
OUT_RELOC(brw->clip.state_bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
BRW_USAGE_STATE,
1);
OUT_RELOC(brw->sf.state_bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
BRW_USAGE_STATE,
0);
OUT_RELOC(brw->wm.state_bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
BRW_USAGE_STATE,
0);
OUT_RELOC(brw->cc.state_bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
BRW_USAGE_STATE,
0);
ADVANCE_BATCH();
@ -288,7 +288,7 @@ static int emit_depthbuffer(struct brw_context *brw)
((surface->layout != PIPE_SURFACE_LAYOUT_LINEAR) << 27) |
(BRW_SURFACE_2D << 29));
OUT_RELOC(bo,
I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
BRW_USAGE_DEPTH_BUFFER,
surface->offset);
OUT_BATCH((BRW_SURFACE_MIPMAPLAYOUT_BELOW << 1) |
((pitch - 1) << 6) |

4
src/gallium/drivers/i965/brw_pipe_query.c
View file

@ -193,7 +193,7 @@ brw_emit_query_begin(struct brw_context *brw)
* to pick up the results.
*/
OUT_RELOC(brw->query.bo,
I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
BRW_USAGE_QUERY_RESULT,
PIPE_CONTROL_GLOBAL_GTT_WRITE |
((brw->query.index * 2) * sizeof(uint64_t)));
OUT_BATCH(0);
@ -234,7 +234,7 @@ brw_emit_query_end(struct brw_context *brw)
PIPE_CONTROL_DEPTH_STALL |
PIPE_CONTROL_WRITE_DEPTH_COUNT);
OUT_RELOC(brw->query.bo,
I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
BRW_USAGE_QUERY_RESULT,
PIPE_CONTROL_GLOBAL_GTT_WRITE |
((brw->query.index * 2 + 1) * sizeof(uint64_t)));
OUT_BATCH(0);

4
src/gallium/drivers/i965/brw_sf_state.c
View file

@ -284,14 +284,14 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key,
*/
/* Emit SF program relocation */
brw->sws->bo_emit_reloc(bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
BRW_USAGE_STATE,
sf.thread0.grf_reg_count << 1,
offsetof(struct brw_sf_unit_state, thread0),
brw->sf.prog_bo);
/* Emit SF viewport relocation */
brw->sws->bo_emit_reloc(bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
BRW_USAGE_STATE,
sf.sf5.front_winding | (sf.sf5.viewport_transform << 1),
offsetof(struct brw_sf_unit_state, sf5),
brw->sf.vp_bo);

2
src/gallium/drivers/i965/brw_vs_state.c
View file

@ -149,7 +149,7 @@ vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key)
/* Emit VS program relocation */
brw->sws->bo_emit_reloc(bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
BRW_USAGE_STATE,
vs.thread0.grf_reg_count << 1,
offsetof(struct brw_vs_unit_state, thread0),
brw->vs.prog_bo);

2
src/gallium/drivers/i965/brw_vs_surface_state.c
View file

@ -170,7 +170,7 @@ brw_vs_get_binding_table(struct brw_context *brw)
*/
drm_intel_bo_emit_reloc(bind_bo, i * 4,
brw->vs.surf_bo[i], 0,
I915_GEM_DOMAIN_INSTRUCTION, 0);
BRW_USAGE_STATE);
}
}

40
src/gallium/drivers/i965/brw_winsys.h
View file

@ -43,25 +43,22 @@ struct brw_winsys_buffer {
unsigned size;
};
/* Describe the usage of a particular buffer in a relocation. The DRM
* winsys will translate these back to GEM read/write domain flags.
*/
enum brw_buffer_usage {
I915_GEM_DOMAIN_RENDER,
I915_GEM_DOMAIN_SAMPLER,
I915_GEM_DOMAIN_VERTEX,
I915_GEM_DOMAIN_INSTRUCTION,
/* XXX: migrate from domains to explicit usage cases, eg below:
*/
/* use on textures */
BRW_USAGE_RENDER = 0x01,
BRW_USAGE_SAMPLER = 0x02,
BRW_USAGE_2D_TARGET = 0x04,
BRW_USAGE_2D_SOURCE = 0x08,
/* use on vertex */
BRW_USAGE_VERTEX = 0x10,
BRW_USAGE_STATE, /* INSTRUCTION, 0 */
BRW_USAGE_QUERY_RESULT, /* INSTRUCTION, INSTRUCTION */
BRW_USAGE_RENDER_TARGET, /* RENDER, 0 */
BRW_USAGE_DEPTH_BUFFER, /* RENDER, RENDER */
BRW_USAGE_SAMPLER, /* SAMPLER, 0 */
BRW_USAGE_VERTEX, /* VERTEX, 0 */
BRW_USAGE_SCRATCH, /* 0, 0 */
};
/* Should be possible to validate usages above against buffer creation
* types, below:
*/
enum brw_buffer_type
{
BRW_BUFFER_TYPE_TEXTURE,
@ -70,10 +67,9 @@ enum brw_buffer_type
BRW_BUFFER_TYPE_CURBE,
BRW_BUFFER_TYPE_QUERY,
BRW_BUFFER_TYPE_SHADER_CONSTANTS,
BRW_BUFFER_TYPE_WM_SCRATCH,
BRW_BUFFER_TYPE_SHADER_SCRATCH,
BRW_BUFFER_TYPE_BATCH,
BRW_BUFFER_TYPE_STATE_CACHE,
BRW_BUFFER_TYPE_MAX /* Count of possible values */
};
@ -98,12 +94,12 @@ struct brw_winsys_screen {
void (*bo_reference)( struct brw_winsys_buffer *buffer );
void (*bo_unreference)( struct brw_winsys_buffer *buffer );
/* XXX: parameter names!!
/* delta -- added to b2->offset, and written into buffer
* offset -- location above value is written to within buffer
*/
int (*bo_emit_reloc)( struct brw_winsys_buffer *buffer,
unsigned domain,
unsigned a,
unsigned b,
enum brw_buffer_usage usage,
unsigned delta,
unsigned offset,
struct brw_winsys_buffer *b2);

2
src/gallium/drivers/i965/brw_wm_constant_buffer.c
View file

@ -37,7 +37,7 @@ brw_create_constant_surface( struct brw_context *brw,
if (key->bo) {
/* Emit relocation to surface contents */
brw->sws->bo_emit_reloc(bo,
I915_GEM_DOMAIN_SAMPLER, 0,
BRW_USAGE_SAMPLER,
0,
offsetof(struct brw_surface_state, ss1),
key->bo);

2
src/gallium/drivers/i965/brw_wm_sampler_state.c
View file

@ -182,7 +182,7 @@ static int upload_wm_samplers( struct brw_context *brw )
/* Emit SDC relocations */
for (i = 0; i < key.sampler_count; i++) {
brw->sws->bo_emit_reloc(brw->wm.sampler_bo,
I915_GEM_DOMAIN_SAMPLER, 0,
BRW_USAGE_SAMPLER,
0,
i * sizeof(struct brw_sampler_state) +
offsetof(struct brw_sampler_state, ss2),

26
src/gallium/drivers/i965/brw_wm_state.c
View file

@ -230,27 +230,27 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key,
/* Emit WM program relocation */
brw->sws->bo_emit_reloc(bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
wm.thread0.grf_reg_count << 1,
offsetof(struct brw_wm_unit_state, thread0),
brw->wm.prog_bo);
BRW_USAGE_STATE,
wm.thread0.grf_reg_count << 1,
offsetof(struct brw_wm_unit_state, thread0),
brw->wm.prog_bo);
/* Emit scratch space relocation */
if (key->total_scratch != 0) {
brw->sws->bo_emit_reloc(bo,
0, 0,
wm.thread2.per_thread_scratch_space,
offsetof(struct brw_wm_unit_state, thread2),
brw->wm.scratch_bo);
BRW_USAGE_SCRATCH,
wm.thread2.per_thread_scratch_space,
offsetof(struct brw_wm_unit_state, thread2),
brw->wm.scratch_bo);
}
/* Emit sampler state relocation */
if (key->sampler_count != 0) {
brw->sws->bo_emit_reloc(bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
wm.wm4.stats_enable | (wm.wm4.sampler_count << 2),
offsetof(struct brw_wm_unit_state, wm4),
brw->wm.sampler_bo);
BRW_USAGE_STATE,
wm.wm4.stats_enable | (wm.wm4.sampler_count << 2),
offsetof(struct brw_wm_unit_state, wm4),
brw->wm.sampler_bo);
}
return bo;
@ -277,7 +277,7 @@ static int upload_wm_unit( struct brw_context *brw )
}
if (brw->wm.scratch_bo == NULL) {
brw->wm.scratch_bo = brw->sws->bo_alloc(brw->sws,
BRW_BUFFER_TYPE_WM_SCRATCH,
BRW_BUFFER_TYPE_SHADER_SCRATCH,
total,
4096);
}

6
src/gallium/drivers/i965/brw_wm_surface_state.c
View file

@ -60,7 +60,7 @@ brw_update_texture_surface( struct brw_context *brw,
/* Emit relocation to surface contents */
brw->sws->bo_emit_reloc(brw->wm.surf_bo[surf],
I915_GEM_DOMAIN_SAMPLER, 0,
BRW_USAGE_SAMPLER,
0,
offsetof(struct brw_surface_state, ss1),
tex->bo);
@ -117,7 +117,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
/* XXX: we will only be rendering to this surface:
*/
brw->sws->bo_emit_reloc(brw->wm.surf_bo[unit],
I915_GEM_DOMAIN_RENDER, 0,
BRW_USAGE_RENDER_TARGET,
ss.ss1.base_addr - surface->bo->offset[0], /* XXX */
offsetof(struct brw_surface_state, ss1),
surface->bo);
@ -161,7 +161,7 @@ brw_wm_get_binding_table(struct brw_context *brw)
/* Emit binding table relocations to surface state */
for (i = 0; i < brw->wm.nr_surfaces; i++) {
brw->sws->bo_emit_reloc(bind_bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
BRW_USAGE_STATE,
0,
i * sizeof(GLuint),
brw->wm.surf_bo[i]);

42
src/gallium/winsys/drm/i965/gem/i965_drm_buffer.c
View file

@ -93,17 +93,51 @@ i965_libdrm_bo_unreference( struct brw_winsys_buffer *buffer )
*/
static int
i965_libdrm_bo_emit_reloc( struct brw_winsys_buffer *buffer,
unsigned domain,
unsigned a,
unsigned b,
enum brw_buffer_usage usage,
unsigned delta,
unsigned offset,
struct brw_winsys_buffer *buffer2)
{
struct i965_libdrm_buffer *buf = i965_libdrm_buffer(buffer);
struct i965_libdrm_buffer *buf2 = i965_libdrm_buffer(buffer2);
int read, write;
int ret;
ret = dri_bo_emit_reloc( buf->bo, domain, a, b, offset, buf2->bo );
switch (usage) {
case BRW_USAGE_STATE:
read = I915_GEM_DOMAIN_INSTRUCTION;
write = 0;
break;
case BRW_USAGE_QUERY_RESULT:
read = I915_GEM_DOMAIN_INSTRUCTION;
write = I915_GEM_DOMAIN_INSTRUCTION;
break;
case BRW_USAGE_RENDER_TARGET:
read = I915_GEM_DOMAIN_RENDER;
write = 0;
break;
case BRW_USAGE_DEPTH_BUFFER:
read = I915_GEM_DOMAIN_RENDER;
write = I915_GEM_DOMAIN_RENDER;
break;
case BRW_USAGE_SAMPLER:
read = I915_GEM_DOMAIN_SAMPLER;
write = 0;
break;
case BRW_USAGE_VERTEX:
read = I915_GEM_DOMAIN_VERTEX;
write = 0;
break;
case BRW_USAGE_SCRATCH:
read = 0;
write = 0;
break;
default:
assert(0);
return -1;
}
ret = dri_bo_emit_reloc( buf->bo, read, write, delta, offset, buf2->bo );
if (ret)
return -1;