From a26ba344a32c89e0a832faaa288acab1131a17e0 Mon Sep 17 00:00:00 2001 From: Pierre-Eric Pelloux-Prayer Date: Thu, 26 Mar 2026 10:36:19 +0100 Subject: [PATCH] ac/info: remove has_bo_metadata MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It's unused. Reviewed-by: Samuel Pitoiset Reviewed-by: Marek Olšák Part-of: --- src/amd/common/ac_gpu_info.c | 2 -- src/amd/common/ac_gpu_info.h | 1 - src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 1 - 3 files changed, 4 deletions(-) diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index df63e2fc9a0..b37aec6c6eb 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -1019,7 +1019,6 @@ ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info, info->has_timeline_syncobj = ac_drm_device_get_sync_provider(dev)->timeline_wait != NULL; info->has_fence_to_handle = true; ac_drm_query_has_vm_always_valid(dev, info); - info->has_bo_metadata = true; info->has_eqaa_surface_allocator = info->gfx_level < GFX11; /* Disable sparse mappings on GFX6 due to VM faults in CP DMA. Enable them once @@ -1983,7 +1982,6 @@ void ac_print_gpu_info(FILE *f, const struct radeon_info *info, int fd) fprintf(f, " has_userptr = %i\n", info->has_userptr); fprintf(f, " has_timeline_syncobj = %u\n", info->has_timeline_syncobj); fprintf(f, " has_vm_always_valid = %u\n", info->has_vm_always_valid); - fprintf(f, " has_bo_metadata = %u\n", info->has_bo_metadata); fprintf(f, " has_eqaa_surface_allocator = %u\n", info->has_eqaa_surface_allocator); fprintf(f, " has_sparse = %u\n", info->has_sparse); fprintf(f, " has_gpuvm_fault_query = %u\n", info->has_gpuvm_fault_query); diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index 1f82b3866fa..702ede3c1df 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -375,7 +375,6 @@ struct radeon_info { bool has_timeline_syncobj; bool has_fence_to_handle; bool has_vm_always_valid; - bool has_bo_metadata; bool has_eqaa_surface_allocator; /* Sparse bindings and basic sparse features (2D image, etc.) */ bool has_sparse; diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c index e748eab22f9..ff15c97dd70 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c @@ -626,7 +626,6 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws) ws->accel_working2 < 3); ws->info.has_cp_dma = true; ws->info.tcc_cache_line_size = 64; /* TC L2 line size on GCN */ - ws->info.has_bo_metadata = false; ws->info.has_eqaa_surface_allocator = false; ws->info.has_sparse = false; ws->info.max_alignment = 1024*1024;