From a1f2a8ebb999e5741feec086eeb0e044ae00db11 Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Mon, 14 Oct 2024 10:04:22 -0700 Subject: [PATCH] freedreno/a6xx: Add VPC hardware workaround for a750 Signed-off-by: Rob Clark Part-of: --- src/gallium/drivers/freedreno/a6xx/fd6_program.cc | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_program.cc b/src/gallium/drivers/freedreno/a6xx/fd6_program.cc index 6cf9a799c53..c7f554d285a 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_program.cc +++ b/src/gallium/drivers/freedreno/a6xx/fd6_program.cc @@ -730,6 +730,16 @@ emit_vpc(struct fd_ringbuffer *ring, const struct program_builder *b) setup_stream_out_disable(b->ctx); } + /* There is a hardware bug on a750 where STRIDE_IN_VPC of 5 to 8 in GS with + * an input primitive type with adjacency, an output primitive type of + * points, and a high enough vertex count causes a hang. + */ + if (b->ctx->screen->info->a7xx.gs_vpc_adjacency_quirk && + b->gs && b->gs->gs.output_primitive == MESA_PRIM_POINTS && + linkage.max_loc > 4) { + linkage.max_loc = MAX2(linkage.max_loc, 9); + } + /* The GPU hangs on some models when there are no outputs (xs_pack::CNT), * at least when a DS is the last stage, so add a dummy output to keep it * happy if there aren't any. We do this late in order to avoid emitting