fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-01-08 19:20:12 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

i965: Set point rasterization rule to UPPER_RIGHT on Gen6-7.5.

Browse source 
Gen4-5 and Gen8+ already set this, but Gen6-7.5 did not.  We ought to
be consistent - the answer depends on the API, not the hardware generation.

The Sandybridge PRM says about RASTRULE_UPPER_RIGHT:

   "To match OpenGL point rasterization rules (round to +infinity, where
    this is the upper right direction wrt OpenGL screen origin of lower
    left).

So this is likely the one we should use.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
This commit is contained in:
Kenneth Graunke 2017-04-26 22:34:50 -07:00
parent 4878ab9bd4
commit a1f12574b0
2 changed files with 3 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/mesa/drivers/dri/i965/gen6_wm_state.c
View file

@ -199,6 +199,8 @@ gen6_upload_wm_state(struct brw_context *brw,
dw6 |= GEN6_WM_MSDISPMODE_PERSAMPLE;
}
dw6 |= GEN6_WM_POINT_RASTRULE_UPPER_RIGHT;
/* From the SNB PRM, volume 2 part 1, page 281:
* "If the PS kernel does not need the Position XY Offsets
* to compute a Position XY value, then this field should be

1
src/mesa/drivers/dri/i965/gen7_wm_state.c
View file

@ -51,6 +51,7 @@ upload_wm_state(struct brw_context *brw)
dw1 |= GEN7_WM_STATISTICS_ENABLE;
dw1 |= GEN7_WM_LINE_AA_WIDTH_1_0;
dw1 |= GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5;
dw1 |= GEN7_WM_POINT_RASTRULE_UPPER_RIGHT;
/* _NEW_LINE */
if (ctx->Line.StippleFlag)