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intel/isl: Bump the MCS halign value for BDW+

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Select a horizontal alignment value that matches the main MSAA surface.

We need a valid horizontal alignment to perform MCS ambiguates. The
halign value doesn't actually affect test behavior, but it is validated
by isl_surf_fill_state. We currently have an invalid halign for gfx125.
This patch fixes that.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22545>
This commit is contained in:
Nanley Chery 2023-05-10 12:25:18 -07:00 • committed by Marge Bot
parent 0a398b0ef9
commit a1ed41dec7
1 changed files with 11 additions and 3 deletions
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14
src/intel/isl/isl.c
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@ -899,10 +899,18 @@ isl_choose_image_alignment_el(const struct isl_device *dev,
* Height, width, and layout of MCS buffer in this case must match with
* Render Target height, width, and layout. MCS buffer is tiledY.
*
* To avoid wasting memory, choose the smallest alignment possible:
* HALIGN_4 and VALIGN_4.
* Pick a vertical and horizontal alignment that matches the main render
* target. Vertical alignment is important for properly spacing an array
* of MCS images. Horizontal alignment is not expected to matter because
* MCS is not mipmapped. Regardless, we pick a valid value here.
*/
*image_align_el = isl_extent3d(4, 4, 1);
if (ISL_GFX_VERX10(dev) >= 125) {
*image_align_el = isl_extent3d(128 * 8 / fmtl->bpb, 4, 1);
} else if (ISL_GFX_VER(dev) >= 8) {
*image_align_el = isl_extent3d(16, 4, 1);
} else {
*image_align_el = isl_extent3d(4, 4, 1);
}
return;
} else if (fmtl->txc == ISL_TXC_HIZ) {
assert(ISL_GFX_VER(dev) >= 6);